Reka Norman has uploaded this change for review. ( https://review.coreboot.org/c/coreboot/+/71676 )
Change subject: Kconfig: Allow mainboards to disable stage cache ......................................................................
Kconfig: Allow mainboards to disable stage cache
On recent Intel ChromeOS devices, although S3 is still supported, only S0ix is used on user devices, so we don't care about optimising S3 resume time. Disabing the stage cache saves boot time at the cost of increasing the S3 resume time.
BUG=b:247940538, b:192032803 TEST=Build and boot on nissa with MAINBOARD_DISABLE_STAGE_CACHE selected.
Change-Id: I243a401a112a12bb824c5447a8fecc99500f7739 Signed-off-by: Reka Norman rekanorman@chromium.org --- M src/Kconfig 1 file changed, 27 insertions(+), 1 deletion(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/76/71676/1
diff --git a/src/Kconfig b/src/Kconfig index f16b53c..f68553c 100644 --- a/src/Kconfig +++ b/src/Kconfig @@ -347,7 +347,7 @@
choice prompt "Stage Cache for ACPI S3 resume" - default NO_STAGE_CACHE if !HAVE_ACPI_RESUME + default NO_STAGE_CACHE if !HAVE_ACPI_RESUME || MAINBOARD_DISABLE_STAGE_CACHE default TSEG_STAGE_CACHE if SMM_TSEG
config NO_STAGE_CACHE @@ -380,6 +380,13 @@
endchoice
+config MAINBOARD_DISABLE_STAGE_CACHE + bool + help + Selected by mainboards which wish to disable the stage cache. + E.g. mainboards which don't use S3 resume in the field may wish to + disable it to save boot time at the cost of increasing S3 resume time. + config UPDATE_IMAGE bool "Update existing coreboot.rom image" help