[coreboot-gerrit] Patch merged into coreboot/master: b718eab arm64: Add function for reading TCR register at current EL

the following patch was just integrated into master:
commit b718eab78d174be2d1a6dc6a21e64fdba341bced
Author: Furquan Shaikh 
Date:   Fri Nov 21 15:27:05 2014 -0800

arm64: Add function for reading TCR register at current EL

TCR at EL1 is 64-bit whereas at EL2 and EL3 it is 32-bit. Thus, use 64-bit
    variables to read / write TCR at current EL. raw_read_tcr_elx will handle it
    automatically by accepting / returning 32-bit / 64-bit values.

BUG=chrome-os-partner:33962
    BRANCH=None
    TEST=Compiles and boots to kernel prompt.

Change-Id: I96312e62a67f482f4233c524ea4e22cbbb60941a
    Signed-off-by: Patrick Georgi 
    Original-Commit-Id: ae71f87143f899383d8311a4ef908908116340d7
    Original-Signed-off-by: Furquan Shaikh 
    Original-Change-Id: I459914808b69318157113504a3ee7cf6c5f4d8d1
    Original-Reviewed-on: https://chromium-review.googlesource.com/231548
    Original-Reviewed-by: Aaron Durbin 
    Original-Tested-by: Furquan Shaikh 
    Original-Commit-Queue: Furquan Shaikh 
    Reviewed-on: http://review.coreboot.org/9537
    Tested-by: build bot (Jenkins)
    Reviewed-by: Stefan Reinauer

See http://review.coreboot.org/9537 for details.

-gerrit