Attention is currently required from: Ana Carolina Cabral, Felix Held, Fred Reitberger, Jason Glenesk, Martin Roth, Matt DeVillier, Matt DeVillier, Paul Menzel.
Nick Kochlowski has posted comments on this change by Nick Kochlowski. ( https://review.coreboot.org/c/coreboot/+/84915?usp=email )
Change subject: driver/amd/opensil: Add PHX OpenSIL POC TP2/TP3 calls
......................................................................
Patch Set 8:
(4 comments)
File src/drivers/amd/opensil/amd_silicon_init.c:
https://review.coreboot.org/c/coreboot/+/84915/comment/421e97b9_ccfbb4f5?usp... :
PS8, Line 29: BOOT_STATE_INIT_ENTRY(BS_DEV_RESOURCES, BS_ON_EXIT, call_opensil_xSIM_timepoint, (void *)XSIM_TIMEPOINT_2);
: BOOT_STATE_INIT_ENTRY(BS_PAYLOAD_LOAD, BS_ON_EXIT, call_opensil_xSIM_timepoint, (void *)XSIM_TIMEPOINT_3);
: BOOT_STATE_INIT_ENTRY(BS_OS_RESUME, BS_ON_ENTRY, call_opensil_xSIM_timepoint, (void *)XSIM_TIMEPOINT_3);
Do these TP2/TP3 calls need to be conditioned to execute only when PHX is selected? Or will this be common for all SoCs?
File src/soc/amd/phoenix/Kconfig:
https://review.coreboot.org/c/coreboot/+/84915/comment/11767205_97b72ba9?usp... :
PS7, Line 103: PLATFORM_USES_OPENSIL
Yeah, I think that seems reasonable. […]
Done
File src/soc/amd/phoenix/chip.c:
PS6:
I mentioned this in a private chat, but I agree that chip.c isn't really the place for this code.
Done
https://review.coreboot.org/c/coreboot/+/84915/comment/37937020_afe71339?usp... :
PS6, Line 41: default:
: break;
the latest patchset prints an error in the default case
Done
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