[coreboot-gerrit] [S] Change in coreboot[main]: soc/intel: Correct return type of fsp_get_pch_reset_status()

[Felix Held (Code Review)]

Felix Held has submitted this change. ( https://review.coreboot.org/c/coreboot/+/84571?usp=email )

Change subject: soc/intel: Correct return type of fsp_get_pch_reset_status()
......................................................................

soc/intel: Correct return type of fsp_get_pch_reset_status()

The `fsp_get_pch_reset_status()` function returns a FSP reset status
code. This change corrects its return type from `uint32_t` to
`efi_return_status_t` to ensure consistency with the FSP API and
prevent potential issues caused by type mismatch.

This correction is necessary for compatibility with both 32-bit and
64-bit FSP interfaces.  The change also updates all callers of this
function in the Meteor Lake and Panther Lake SoCs to use the correct
return type.

Includes `fsp/api.h` to provide the `efi_return_status_t` definition.

BUG=b:347669091
TEST=Verified global reset functionality on google/rex0 (32-bit) and
     google/rex64 (64-bit) platforms.

Change-Id: I0cdee541506bf424f50fd00833d5ee200a3a8a48
Signed-off-by: Subrata Banik 
Reviewed-on: https://review.coreboot.org/c/coreboot/+/84571
Reviewed-by: Jérémy Compostella 
Reviewed-by: Christian Walter 
Reviewed-by: Karthik Ramasubramanian 
Tested-by: build bot (Jenkins) 
---
M src/soc/intel/common/fsp_reset.c
M src/soc/intel/common/reset.h
M src/soc/intel/meteorlake/chip.c
M src/soc/intel/pantherlake/chip.c
4 files changed, 11 insertions(+), 9 deletions(-)

Approvals:
  Jérémy Compostella: Looks good to me, but someone else must approve
  Karthik Ramasubramanian: Looks good to me, approved
  Christian Walter: Looks good to me, approved
  build bot (Jenkins): Verified

diff --git a/src/soc/intel/common/fsp_reset.c b/src/soc/intel/common/fsp_reset.c
index 2626c39..983d4fc 100644
--- a/src/soc/intel/common/fsp_reset.c
+++ b/src/soc/intel/common/fsp_reset.c
@@ -41,7 +41,7 @@
    die("unknown reset type");
 }

-static uint32_t fsp_reset_type_to_status(EFI_RESET_TYPE reset_type)
+static efi_return_status_t fsp_reset_type_to_status(EFI_RESET_TYPE reset_type)
 {
    efi_return_status_t status;

@@ -68,7 +68,7 @@
  * If reset type is `EfiResetPlatformSpecific` then relying on pch_reset_data structure
  * to know if the reset type is a global reset.
  */
-uint32_t fsp_get_pch_reset_status(void)
+efi_return_status_t fsp_get_pch_reset_status(void)
 {
    size_t size;
    const struct fsp_reset_hob *hob = fsp_find_extension_hob_by_guid(fsp_reset_guid, &size);
diff --git a/src/soc/intel/common/reset.h b/src/soc/intel/common/reset.h
index d9c6ac6..658223c 100644
--- a/src/soc/intel/common/reset.h
+++ b/src/soc/intel/common/reset.h
@@ -3,6 +3,8 @@
 #ifndef _INTEL_COMMON_RESET_H_
 #define _INTEL_COMMON_RESET_H_

+#include <efi/efi_datatype.h>
+
 /*
  * Implement SoC specific global reset (i.e. a reset of both host and
  * ME partitions). Usually the ME is asked to perform the reset first.
@@ -21,6 +23,6 @@
  * If reset type if `EfiResetPlatformSpecific` then relying on pch_reset_data structure
  * to know if the reset type is a global reset.
  */
-uint32_t fsp_get_pch_reset_status(void);
+efi_return_status_t fsp_get_pch_reset_status(void);

#endif	/* _INTEL_COMMON_RESET_H_ */
diff --git a/src/soc/intel/meteorlake/chip.c b/src/soc/intel/meteorlake/chip.c
index 84b9235b2..d2011f9 100644
--- a/src/soc/intel/meteorlake/chip.c
+++ b/src/soc/intel/meteorlake/chip.c
@@ -264,7 +264,7 @@

static void soc_init_final_device(void *chip_info)
 {
-	uint32_t reset_status = fsp_get_pch_reset_status();
+	efi_return_status_t reset_status = fsp_get_pch_reset_status();

if (reset_status == FSP_SUCCESS)
    	return;
@@ -273,8 +273,8 @@
    fsp_handle_reset(reset_status);

/* Control shouldn't return here */
-	die_with_post_code(POSTCODE_HW_INIT_FAILURE,
-		 "Failed to handle the FSP reset request with error 0x%08x\n", reset_status);
+	fsp_die_with_post_code(reset_status, POSTCODE_HW_INIT_FAILURE,
+			 "Failed to handle the FSP reset request with error");
 }

struct chip_operations soc_intel_meteorlake_ops = {
diff --git a/src/soc/intel/pantherlake/chip.c b/src/soc/intel/pantherlake/chip.c
index 4e7d573..2d9f67a 100644
--- a/src/soc/intel/pantherlake/chip.c
+++ b/src/soc/intel/pantherlake/chip.c
@@ -262,7 +262,7 @@

static void soc_init_final_device(void *chip_info)
 {
-	uint32_t reset_status = fsp_get_pch_reset_status();
+	efi_return_status_t reset_status = fsp_get_pch_reset_status();

if (reset_status == FSP_SUCCESS)
    	return;
@@ -271,8 +271,8 @@
    fsp_handle_reset(reset_status);

/* Control shouldn't return here */
-	die_with_post_code(POSTCODE_HW_INIT_FAILURE,
-		 "Failed to handle the FSP reset request with error 0x%08x\n", reset_status);
+	fsp_die_with_post_code(reset_status, POSTCODE_HW_INIT_FAILURE,
+			 "Failed to handle the FSP reset request with error");
 }

struct chip_operations soc_intel_pantherlake_ops = {