Attention is currently required from: Ashish Kumar Mishra, Dinesh Gehlot, Eran Mitrani, Felix Singer, Jakub Czapiga, Jérémy Compostella, Kapil Porwal, Saurabh Mishra, Tarun.
Subrata Banik has posted comments on this change by Saurabh Mishra. ( https://review.coreboot.org/c/coreboot/+/83354?usp=email )
Change subject: soc/intel/ptl: Do initial Panther Lake SoC commit till bootblock
......................................................................
Patch Set 18:
(3 comments)
File src/soc/intel/pantherlake/Kconfig:
https://review.coreboot.org/c/coreboot/+/83354/comment/a498ed3f_5437f271?usp... :
PS14, Line 67: ~1KiB)
Corrected to use 0x88000.
can you please check what is the min-FSP stack req for PTL?
File src/soc/intel/pantherlake/include/soc/iomap.h:
https://review.coreboot.org/c/coreboot/+/83354/comment/9ff75f45_15745038?usp... :
PS8, Line 37: fc800000
We can close this comment query? since no DMI3BAR for PTL Mobile.
Acknowledged
File src/soc/intel/pantherlake/include/soc/p2sb.h:
https://review.coreboot.org/c/coreboot/+/83354/comment/a6c022ca_547180de?usp... :
PS18, Line 6: #define HPTC_OFFSET 0x60
: #define HPTC_ADDR_ENABLE_BIT BIT(7)
```
#define HPTC_OFFSET 0x60
#define HPTC_ADDR_ENABLE_BIT BIT(7)
```
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