[coreboot-gerrit] [M] Change in coreboot[main]: drivers/intel/dtbt: Add discrete Thunderbolt driver

[Tim Crawford (Code Review)]

Attention is currently required from: Kyösti Mälkki, Martin L Roth, Michał Żygowski, Paul Menzel, Tim Wawrzynczak, Utkarsh H Patel.

Tim Crawford has posted comments on this change by Tim Crawford. ( https://review.coreboot.org/c/coreboot/+/75286?usp=email )

Change subject: drivers/intel/dtbt: Add discrete Thunderbolt driver
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Patch Set 10:

(1 comment)

File src/drivers/intel/dtbt/dtbt.c:

https://review.coreboot.org/c/coreboot/+/75286/comment/3afa8f0f_9a26b8d0?usp... :
PS10, Line 15: #define PCIE2TBT_GO2SX			2
             : #define PCIE2TBT_GO2SX_NO_WAKE		3
             : #define PCIE2TBT_SX_EXIT_TBT_CONNECTED	4
             : #define PCIE2TBT_OS_UP			6
             : #define PCIE2TBT_SET_SECURITY_LEVEL	8
             : #define PCIE2TBT_GET_SECURITY_LEVEL	9
             : #define PCIE2TBT_BOOT_ON		24
             : #define PCIE2TBT_USB_ON			25
             : #define PCIE2TBT_GET_ENUMERATION_METHOD	26
             : #define PCIE2TBT_SET_ENUMERATION_METHOD	27
             : #define PCIE2TBT_POWER_CYCLE		28
             : #define PCIE2TBT_SX_START		29
             : #define PCIE2TBT_ACL_BOOT		30
             : #define PCIE2TBT_CONNECT_TOPOLOGY	31
Barlow Ridge (TBT5) only supports the mailbox commands:

- 0x24: `GO2SLEEP`
- 0x31: `Set_Class_Code`