Felix Held has submitted this change. ( https://review.coreboot.org/c/coreboot/+/81554?usp=email )
Change subject: device/device_util: Rename dev_get_pci_domain ......................................................................
device/device_util: Rename dev_get_pci_domain
In coreboot, domain indicates hardware units that provide/group resource windows, For Xeon-SP, domains are PCIe compatible and further function in many aspects, e.g. PCIe, CXL, IOAT, UBOX.
Rename dev_get_pci_domain to dev_get_domain to align with coreboot concept and distinguish from Xeon-SP concept.
TEST=Build and boot on intel/archercity CRB
Change-Id: I51b18b30fb41038869ea1384b01091da31a895b9 Signed-off-by: Shuo Liu shuo.liu@intel.com Reviewed-on: https://review.coreboot.org/c/coreboot/+/81554 Tested-by: build bot (Jenkins) no-reply@coreboot.org Reviewed-by: Felix Held felix-coreboot@felixheld.de --- M src/device/device_util.c M src/include/device/device.h M src/soc/intel/xeon_sp/chip_common.c M src/soc/intel/xeon_sp/include/soc/chip_common.h M src/soc/intel/xeon_sp/uncore_acpi.c 5 files changed, 14 insertions(+), 14 deletions(-)
Approvals: build bot (Jenkins): Verified Felix Held: Looks good to me, approved
diff --git a/src/device/device_util.c b/src/device/device_util.c index 10e4a0d..5e353c2 100644 --- a/src/device/device_util.c +++ b/src/device/device_util.c @@ -247,10 +247,10 @@ return "unknown"; }
-/* Returns the PCI domain for the given PCI device */ -const struct device *dev_get_pci_domain(const struct device *dev) +/* Returns the domain for the given device */ +const struct device *dev_get_domain(const struct device *dev) { - /* Walk up the tree up to the PCI domain */ + /* Walk up the tree up to the domain */ while (dev && dev->upstream && !is_root_device(dev)) { dev = dev->upstream->dev; if (dev->path.type == DEVICE_PATH_DOMAIN) diff --git a/src/include/device/device.h b/src/include/device/device.h index 7f73d2b..ac7e8691 100644 --- a/src/include/device/device.h +++ b/src/include/device/device.h @@ -182,7 +182,7 @@ const char *dev_name(const struct device *dev); const char *dev_path(const struct device *dev); u32 dev_path_encode(const struct device *dev); -const struct device *dev_get_pci_domain(const struct device *dev); +const struct device *dev_get_domain(const struct device *dev); void dev_set_enabled(struct device *dev, int enable); void disable_children(struct bus *bus); bool dev_is_active_bridge(struct device *dev); diff --git a/src/soc/intel/xeon_sp/chip_common.c b/src/soc/intel/xeon_sp/chip_common.c index 0e9fcdc..d8e7d14 100644 --- a/src/soc/intel/xeon_sp/chip_common.c +++ b/src/soc/intel/xeon_sp/chip_common.c @@ -44,7 +44,7 @@ if (dev->path.type != DEVICE_PATH_PCI) return 0;
- const struct device *domain = dev_get_pci_domain(dev); + const struct device *domain = dev_get_domain(dev); if (!domain) return 0;
@@ -139,7 +139,7 @@ if (dev->path.type == DEVICE_PATH_DOMAIN) domain = dev; else - domain = dev_get_pci_domain(dev); + domain = dev_get_domain(dev);
if (!domain) return -1; @@ -165,7 +165,7 @@ if (dev->path.type == DEVICE_PATH_DOMAIN) domain = dev; else - domain = dev_get_pci_domain(dev); + domain = dev_get_domain(dev);
if (!domain) return -1; diff --git a/src/soc/intel/xeon_sp/include/soc/chip_common.h b/src/soc/intel/xeon_sp/include/soc/chip_common.h index 55e8a6c..5fd5dc6 100644 --- a/src/soc/intel/xeon_sp/include/soc/chip_common.h +++ b/src/soc/intel/xeon_sp/include/soc/chip_common.h @@ -78,14 +78,14 @@ bool is_ubox_domain(const struct device *dev); bool is_cxl_domain(const struct device *dev);
-#define is_dev_on_pcie_domain(dev) is_pcie_domain(dev_get_pci_domain(dev)) -#define is_dev_on_ioat_domain(dev) is_ioat_domain(dev_get_pci_domain(dev)) -#define is_dev_on_ubox_domain(dev) is_ubox_domain(dev_get_pci_domain(dev)) -#define is_dev_on_cxl_domain(dev) is_cxl_domain(dev_get_pci_domain(dev)) +#define is_dev_on_pcie_domain(dev) is_pcie_domain(dev_get_domain(dev)) +#define is_dev_on_ioat_domain(dev) is_ioat_domain(dev_get_domain(dev)) +#define is_dev_on_ubox_domain(dev) is_ubox_domain(dev_get_domain(dev)) +#define is_dev_on_cxl_domain(dev) is_cxl_domain(dev_get_domain(dev))
#define is_domain0(dev) (dev && dev->path.type == DEVICE_PATH_DOMAIN &&\ dev->path.domain.domain == 0) -#define is_dev_on_domain0(dev) (is_domain0(dev_get_pci_domain(dev))) +#define is_dev_on_domain0(dev) (is_domain0(dev_get_domain(dev))) #define is_stack0(socket, stack) (socket == 0 && stack == IioStack0)
void unlock_pam_regions(void); diff --git a/src/soc/intel/xeon_sp/uncore_acpi.c b/src/soc/intel/xeon_sp/uncore_acpi.c index bf9a44a..bcfb4da 100644 --- a/src/soc/intel/xeon_sp/uncore_acpi.c +++ b/src/soc/intel/xeon_sp/uncore_acpi.c @@ -315,7 +315,7 @@
// Add PCIe Ports if (!is_dev_on_domain0(iommu)) { - const struct device *domain = dev_get_pci_domain(iommu); + const struct device *domain = dev_get_domain(iommu); struct device *dev = NULL; while ((dev = dev_bus_each_child(domain->downstream, dev))) if ((dev->hdr_type & 0x7f) == PCI_HEADER_TYPE_BRIDGE) @@ -535,7 +535,7 @@ struct device *dev = NULL; struct device *iommu0 = NULL; while ((dev = dev_find_device(PCI_VID_INTEL, MMAP_VTD_CFG_REG_DEVID, dev))) { - if (is_domain0(dev_get_pci_domain(dev))) { + if (is_domain0(dev_get_domain(dev))) { iommu0 = dev; continue; }