[coreboot-gerrit] [S] Change in coreboot[master]: soc/intel/xeon_sp: Move SMBIOS type 4 override functions from mainboa...

[Shuming Chu (Shuming) (Code Review)]

Attention is currently required from: Jonathan Zhang, Johnny Lin, Christian Walter, Jingle Hsu, Arthur Heymans.

Hello Jingle Hsu,

I'd like you to do a code review.
Please visit

https://review.coreboot.org/c/coreboot/+/69363

to review the following change.

Change subject: soc/intel/xeon_sp: Move SMBIOS type 4 override functions from mainboard to soc
......................................................................

soc/intel/xeon_sp: Move SMBIOS type 4 override functions from mainboard
to soc

Move SMBIOS type 4 override functions from mainboard to soc so that all
xeon family cpus share same functions without implementing again.

Tested=On OCP Deltalake, dmidecode -t 4 shows expected info.

Signed-off-by: JingleHsuWiwynn 
Change-Id: I17df8de67bc2f5e89ea04da36efb2480a7e73174
---
M src/mainboard/ocp/deltalake/ramstage.c
M src/soc/intel/xeon_sp/ramstage.c
2 files changed, 27 insertions(+), 11 deletions(-)

git pull ssh://review.coreboot.org:29418/coreboot refs/changes/63/69363/1

diff --git a/src/mainboard/ocp/deltalake/ramstage.c b/src/mainboard/ocp/deltalake/ramstage.c
index fb81e10..0fca920 100644
--- a/src/mainboard/ocp/deltalake/ramstage.c
+++ b/src/mainboard/ocp/deltalake/ramstage.c
@@ -327,17 +327,6 @@
    t->bank_locator = smbios_add_string(t->eos, buf);
 }

-unsigned int smbios_processor_family(struct cpuid_result res)
-{
-	return 0xb3; /* Xeon */
-}
-
-unsigned int smbios_processor_characteristics(void)
-{
-	/* 64-bit Capable, Multi-Core, Power/Performance Control */
-	return 0x8c; /* BIT2 | BIT3 | BIT7 */
-}
-
 static void mainboard_enable(struct device *dev)
 {
    dev->ops->get_smbios_strings = dl_oem_smbios_strings;
diff --git a/src/soc/intel/xeon_sp/ramstage.c b/src/soc/intel/xeon_sp/ramstage.c
index 68d5d46..ce60e98 100644
--- a/src/soc/intel/xeon_sp/ramstage.c
+++ b/src/soc/intel/xeon_sp/ramstage.c
@@ -1,5 +1,6 @@
 /* SPDX-License-Identifier: GPL-2.0-only */

+#include <arch/cpu.h>
 #include <smbios.h>

unsigned int smbios_cache_error_correction_type(u8 level)
@@ -24,3 +25,13 @@
    	return SMBIOS_CACHE_OP_MODE_UNKNOWN;
    }
 }
+
+unsigned int smbios_processor_family(struct cpuid_result res)
+{
+	return SMBIOS_PROCESSOR_FAMILY_XEON;
+}
+
+unsigned int smbios_processor_characteristics(void)
+{
+	return PROCESSOR_64BIT_CAPABLE|PROCESSOR_MULTI_CORE|PROCESSOR_POWER_PERFORMANCE_CONTROL;
+}