Attention is currently required from: Felix Held, Jason Glenesk, Konrad Adamczyk, Matt DeVillier, Raul Rangel.
Fred Reitberger has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/76107?usp=email )
Change subject: vendorcode/amd/fsp/common: Refactor dmi_info.h
......................................................................
Patch Set 2:
(2 comments)
File src/vendorcode/amd/fsp/glinda/soc_dmi_info.h:
https://review.coreboot.org/c/coreboot/+/76107/comment/8e5582e5_5824f01b :
PS2, Line 6:
Please add `/* TODO: Update for Glinda */`
File src/vendorcode/amd/fsp/mendocino/soc_dmi_info.h:
https://review.coreboot.org/c/coreboot/+/76107/comment/d3db53b4_f367fb6b :
PS2, Line 10: #define MAX_SOCKETS_SUPPORTED 2 ///< Max number of sockets in system
: #define MAX_CHANNELS_PER_SOCKET 8 ///< Max Channels per sockets
: #define MAX_DIMMS_PER_CHANNEL 4 ///< Max DIMMs on a memory channel (independent of platform)
:
I *think* mendocino is 4/12/2 here like phoenix - at least that matches the constants in the FSP code.
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