Scott Chao has uploaded this change for review. ( https://review.coreboot.org/c/coreboot/+/63680 )
Change subject: lib: Add LPDDR5 DRAM type ......................................................................
lib: Add LPDDR5 DRAM type
TEST=Not seeing default msg "Defaulting to using DDR4 params." with this CL.
Signed-off-by: Scott Chao scott_chao@wistron.corp-partner.google.com Change-Id: I98ba9e87b1a093b93434334a75c9a9252effa933 --- M src/lib/spd_bin.c 1 file changed, 2 insertions(+), 0 deletions(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/80/63680/1
diff --git a/src/lib/spd_bin.c b/src/lib/spd_bin.c index 1b236b0..823f717 100644 --- a/src/lib/spd_bin.c +++ b/src/lib/spd_bin.c @@ -34,6 +34,7 @@ case SPD_DRAM_LPDDR3_JEDEC: case SPD_DRAM_DDR4: case SPD_DRAM_DDR5: + case SPD_DRAM_LPDDR5: case SPD_DRAM_LPDDR4: case SPD_DRAM_LPDDR4X: return true; @@ -165,6 +166,7 @@ case SPD_DRAM_LPDDR3_JEDEC: case SPD_DRAM_DDR4: case SPD_DRAM_DDR5: + case SPD_DRAM_LPDDR5: case SPD_DRAM_LPDDR4: case SPD_DRAM_LPDDR4X: if (spd[DDR4_SPD_PART_OFF]) {