Elyes Haouas has uploaded this change for review. ( https://review.coreboot.org/c/coreboot/+/83918?usp=email )
Change subject: [Prepare for C23]BAYTRAIL: Use nullptr instead of NULL ......................................................................
[Prepare for C23]BAYTRAIL: Use nullptr instead of NULL
Modern C provides nullptr constant. Prepare to use it unstead of macro.
Change-Id: I246a7354ec223a7c9635148a58e760c4629084a4 Signed-off-by: Elyes Haouas ehaouas@noos.fr --- M src/mainboard/google/rambi/mainboard.c M src/mainboard/google/rambi/romstage.c M src/mainboard/google/rambi/variants/ninja/lan.c M src/mainboard/google/rambi/variants/sumo/lan.c M src/soc/intel/baytrail/chip.c M src/soc/intel/baytrail/dptf.c M src/soc/intel/baytrail/gfx.c M src/soc/intel/baytrail/gpio.c M src/soc/intel/baytrail/hda.c M src/soc/intel/baytrail/lpe.c M src/soc/intel/baytrail/perf_power.c M src/soc/intel/baytrail/pmutil.c M src/soc/intel/baytrail/ramstage.c M src/soc/intel/baytrail/refcode.c M src/soc/intel/baytrail/romstage/pmc.c M src/soc/intel/baytrail/romstage/raminit.c M src/soc/intel/baytrail/romstage/romstage.c M src/soc/intel/baytrail/smihandler.c M src/soc/intel/baytrail/southcluster.c 19 files changed, 59 insertions(+), 59 deletions(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/18/83918/1
diff --git a/src/mainboard/google/rambi/mainboard.c b/src/mainboard/google/rambi/mainboard.c index df27e39..19a5805 100644 --- a/src/mainboard/google/rambi/mainboard.c +++ b/src/mainboard/google/rambi/mainboard.c @@ -64,4 +64,4 @@ ncore_select_func(SOC_DDI1_VDDEN_PAD, PAD_FUNC2); }
-BOOT_STATE_INIT_ENTRY(BS_DEV_INIT, BS_ON_EXIT, edp_vdden_cb, NULL); +BOOT_STATE_INIT_ENTRY(BS_DEV_INIT, BS_ON_EXIT, edp_vdden_cb, nullptr); diff --git a/src/mainboard/google/rambi/romstage.c b/src/mainboard/google/rambi/romstage.c index b9aa870..a73192a 100644 --- a/src/mainboard/google/rambi/romstage.c +++ b/src/mainboard/google/rambi/romstage.c @@ -33,7 +33,7 @@ printk(BIOS_DEBUG, "ram_id=%d, total_spds: %d\n", ram_id, total_spds);
if (ram_id >= total_spds) - return NULL; + return nullptr;
/* Single channel configs */ if (dual_channel_config & (1 << ram_id)) diff --git a/src/mainboard/google/rambi/variants/ninja/lan.c b/src/mainboard/google/rambi/variants/ninja/lan.c index 8dfdb08..27d1c6af 100644 --- a/src/mainboard/google/rambi/variants/ninja/lan.c +++ b/src/mainboard/google/rambi/variants/ninja/lan.c @@ -90,7 +90,7 @@
static void program_mac_address(u16 io_base) { - void *search_address = NULL; + void *search_address = nullptr; size_t search_length = -1;
/* Default MAC Address of A0:00:BA:D0:0B:AD */ @@ -103,14 +103,14 @@ if (fmap_locate_area_as_rdev("RO_VPD", &rdev) == 0) { search_address = rdev_mmap_full(&rdev);
- if (search_address != NULL) + if (search_address != nullptr) search_length = region_device_sz(&rdev); } } else { search_address = cbfs_map("vpd.bin", &search_length); }
- if (search_address == NULL) + if (search_address == nullptr) printk(BIOS_ERR, "LAN: VPD not found.\n"); else get_mac_address(&high_dword, &low_dword, search_address, @@ -133,12 +133,12 @@ void lan_init(void) { u16 io_base = 0; - struct device *ethernet_dev = NULL; + struct device *ethernet_dev = nullptr;
/* Get NIC's IO base address */ ethernet_dev = dev_find_device(NINJA_NIC_VENDOR_ID, NINJA_NIC_DEVICE_ID, 0); - if (ethernet_dev != NULL) { + if (ethernet_dev != nullptr) { io_base = pci_read_config16(ethernet_dev, 0x10) & 0xfffe;
/* diff --git a/src/mainboard/google/rambi/variants/sumo/lan.c b/src/mainboard/google/rambi/variants/sumo/lan.c index 168f8b5..f2b9378 100644 --- a/src/mainboard/google/rambi/variants/sumo/lan.c +++ b/src/mainboard/google/rambi/variants/sumo/lan.c @@ -90,7 +90,7 @@
static void program_mac_address(u16 io_base) { - void *search_address = NULL; + void *search_address = nullptr; size_t search_length = -1;
/* Default MAC Address of A0:00:BA:D0:0B:AD */ @@ -103,14 +103,14 @@ if (fmap_locate_area_as_rdev("RO_VPD", &rdev) == 0) { search_address = rdev_mmap_full(&rdev);
- if (search_address != NULL) + if (search_address != nullptr) search_length = region_device_sz(&rdev); } } else { search_address = cbfs_map("vpd.bin", &search_length); }
- if (search_address == NULL) + if (search_address == nullptr) printk(BIOS_ERR, "LAN: VPD not found.\n"); else get_mac_address(&high_dword, &low_dword, search_address, @@ -133,12 +133,12 @@ void lan_init(void) { u16 io_base = 0; - struct device *ethernet_dev = NULL; + struct device *ethernet_dev = nullptr;
/* Get NIC's IO base address */ ethernet_dev = dev_find_device(SUMO_NIC_VENDOR_ID, SUMO_NIC_DEVICE_ID, 0); - if (ethernet_dev != NULL) { + if (ethernet_dev != nullptr) { io_base = pci_read_config16(ethernet_dev, 0x10) & 0xfffe;
/* diff --git a/src/soc/intel/baytrail/chip.c b/src/soc/intel/baytrail/chip.c index fdfd129..36875c7 100644 --- a/src/soc/intel/baytrail/chip.c +++ b/src/soc/intel/baytrail/chip.c @@ -30,7 +30,7 @@ } else if (dev->path.type == DEVICE_PATH_PCI) { /* Handle south cluster enablement. */ if (PCI_SLOT(dev->path.pci.devfn) > GFX_DEV && - (dev->ops == NULL || dev->ops->enable == NULL)) { + (dev->ops == nullptr || dev->ops->enable == nullptr)) { southcluster_enable_dev(dev); } } diff --git a/src/soc/intel/baytrail/dptf.c b/src/soc/intel/baytrail/dptf.c index d2658f9..23b17e9 100644 --- a/src/soc/intel/baytrail/dptf.c +++ b/src/soc/intel/baytrail/dptf.c @@ -30,4 +30,4 @@ reg_script_run(dptf_init_settings); }
-BOOT_STATE_INIT_ENTRY(BS_DEV_INIT, BS_ON_ENTRY, dptf_init, NULL); +BOOT_STATE_INIT_ENTRY(BS_DEV_INIT, BS_ON_ENTRY, dptf_init, nullptr); diff --git a/src/soc/intel/baytrail/gfx.c b/src/soc/intel/baytrail/gfx.c index 1027168..5813bb4 100644 --- a/src/soc/intel/baytrail/gfx.c +++ b/src/soc/intel/baytrail/gfx.c @@ -281,7 +281,7 @@
res = probe_resource(dev, PCI_BASE_ADDRESS_0);
- if (res == NULL) + if (res == nullptr) return;
/* Default to 200 Hz if nothing is set. */ diff --git a/src/soc/intel/baytrail/gpio.c b/src/soc/intel/baytrail/gpio.c index 38e2d2f..956de5e 100644 --- a/src/soc/intel/baytrail/gpio.c +++ b/src/soc/intel/baytrail/gpio.c @@ -226,5 +226,5 @@ struct soc_gpio_config* __weak mainboard_get_gpios(void) { printk(BIOS_DEBUG, "Default/empty GPIO config\n"); - return NULL; + return nullptr; } diff --git a/src/soc/intel/baytrail/hda.c b/src/soc/intel/baytrail/hda.c index 46fbce1..2f70de0 100644 --- a/src/soc/intel/baytrail/hda.c +++ b/src/soc/intel/baytrail/hda.c @@ -64,7 +64,7 @@ reg_script_run_on_dev(dev, init_ops);
res = probe_resource(dev, PCI_BASE_ADDRESS_0); - if (res == NULL) + if (res == nullptr) return;
base = res2mmio(res, 0, 0); diff --git a/src/soc/intel/baytrail/lpe.c b/src/soc/intel/baytrail/lpe.c index 71a1e1f..671af41 100644 --- a/src/soc/intel/baytrail/lpe.c +++ b/src/soc/intel/baytrail/lpe.c @@ -113,7 +113,7 @@ const struct pattrs *pattrs = pattrs_get();
res = probe_resource(dev, FIRMWARE_PCI_REG_BASE); - if (res == NULL) { + if (res == nullptr) { printk(BIOS_DEBUG, "LPE Firmware memory not found.\n"); return; } diff --git a/src/soc/intel/baytrail/perf_power.c b/src/soc/intel/baytrail/perf_power.c index 8783e1f..108f870 100644 --- a/src/soc/intel/baytrail/perf_power.c +++ b/src/soc/intel/baytrail/perf_power.c @@ -268,5 +268,5 @@ reg_script_run(perf_power_settings); }
-BOOT_STATE_INIT_ENTRY(BS_OS_RESUME, BS_ON_ENTRY, perf_power, NULL); -BOOT_STATE_INIT_ENTRY(BS_PAYLOAD_LOAD, BS_ON_EXIT, perf_power, NULL); +BOOT_STATE_INIT_ENTRY(BS_OS_RESUME, BS_ON_ENTRY, perf_power, nullptr); +BOOT_STATE_INIT_ENTRY(BS_PAYLOAD_LOAD, BS_ON_EXIT, perf_power, nullptr); diff --git a/src/soc/intel/baytrail/pmutil.c b/src/soc/intel/baytrail/pmutil.c index 6308227..f3b5838 100644 --- a/src/soc/intel/baytrail/pmutil.c +++ b/src/soc/intel/baytrail/pmutil.c @@ -334,7 +334,7 @@ int rtc_fail; struct chipset_power_state *ps = acpi_get_pm_state();
- if (ps != NULL) + if (ps != nullptr) gen_pmcon1 = ps->gen_pmcon1; else gen_pmcon1 = read32((u32 *)(PMC_BASE_ADDRESS + GEN_PMCON1)); diff --git a/src/soc/intel/baytrail/ramstage.c b/src/soc/intel/baytrail/ramstage.c index 4e8dc68..30fbea6 100644 --- a/src/soc/intel/baytrail/ramstage.c +++ b/src/soc/intel/baytrail/ramstage.c @@ -155,7 +155,7 @@ gnvs->pm1i); }
-BOOT_STATE_INIT_ENTRY(BS_PRE_DEVICE, BS_ON_ENTRY, acpi_save_wake_source, NULL); +BOOT_STATE_INIT_ENTRY(BS_PRE_DEVICE, BS_ON_ENTRY, acpi_save_wake_source, nullptr);
static void baytrail_enable_2x_refresh_rate(void) { diff --git a/src/soc/intel/baytrail/refcode.c b/src/soc/intel/baytrail/refcode.c index 94adfa1..930956d 100644 --- a/src/soc/intel/baytrail/refcode.c +++ b/src/soc/intel/baytrail/refcode.c @@ -33,7 +33,7 @@
if (rmodule_stage_load(&refcode)) { printk(BIOS_DEBUG, "Error loading reference code.\n"); - return NULL; + return nullptr; }
/* Cache loaded reference code. */ @@ -53,7 +53,7 @@
entry = load_reference_code();
- if (entry == NULL) + if (entry == nullptr) return;
wrp.tsc_ticks_per_microsecond = tsc_freq_mhz(); diff --git a/src/soc/intel/baytrail/romstage/pmc.c b/src/soc/intel/baytrail/romstage/pmc.c index be058d0..bb92aeb 100644 --- a/src/soc/intel/baytrail/romstage/pmc.c +++ b/src/soc/intel/baytrail/romstage/pmc.c @@ -18,7 +18,7 @@ { uint32_t reg; uint8_t rid; - const struct soc_intel_baytrail_config *cfg = NULL; + const struct soc_intel_baytrail_config *cfg = nullptr;
rid = pci_read_config8(IOSF_PCI_DEV, REVID);
@@ -28,7 +28,7 @@ /* Write bits 17:16 of SB_BIOS_CONFIG in the PUNIT. */ reg |= SB_BIOS_CONFIG_PERF_MODE | SB_BIOS_CONFIG_PDM_MODE; /* Configure VR low power mode for C0 and above. */ - if (rid >= RID_C_STEPPING_START && cfg != NULL && + if (rid >= RID_C_STEPPING_START && cfg != nullptr && (cfg->vnn_ps2_enable || cfg->vcc_ps2_enable)) { printk(BIOS_DEBUG, "Enabling VR PS2 mode:"); if (cfg->vnn_ps2_enable) { diff --git a/src/soc/intel/baytrail/romstage/raminit.c b/src/soc/intel/baytrail/romstage/raminit.c index 6244072..61c6af2 100644 --- a/src/soc/intel/baytrail/romstage/raminit.c +++ b/src/soc/intel/baytrail/romstage/raminit.c @@ -153,7 +153,7 @@ }
/* Determine if mrc.bin is in the cbfs. */ - if (cbfs_map("mrc.bin", NULL) == NULL) { + if (cbfs_map("mrc.bin", nullptr) == nullptr) { printk(BIOS_DEBUG, "Couldn't find mrc.bin\n"); return; } @@ -195,7 +195,7 @@ printk(BIOS_DEBUG, "MRC data at %p %d bytes\n", mp->data_to_save, mp->data_to_save_size);
- if (mp->data_to_save != NULL && mp->data_to_save_size > 0) + if (mp->data_to_save != nullptr && mp->data_to_save_size > 0) mrc_cache_stash_data(MRC_TRAINING_DATA, 0, mp->data_to_save, mp->data_to_save_size); } diff --git a/src/soc/intel/baytrail/romstage/romstage.c b/src/soc/intel/baytrail/romstage/romstage.c index 658da2c..a49057d 100644 --- a/src/soc/intel/baytrail/romstage/romstage.c +++ b/src/soc/intel/baytrail/romstage/romstage.c @@ -26,7 +26,7 @@ ps_car = &power_state; ps_cbmem = cbmem_add(CBMEM_ID_POWER_STATE, sizeof(*ps_cbmem));
- if (ps_cbmem == NULL) { + if (ps_cbmem == nullptr) { printk(BIOS_DEBUG, "Not adding power state to cbmem!\n"); return; } diff --git a/src/soc/intel/baytrail/smihandler.c b/src/soc/intel/baytrail/smihandler.c index 9a47843..f68bfb0 100644 --- a/src/soc/intel/baytrail/smihandler.c +++ b/src/soc/intel/baytrail/smihandler.c @@ -165,7 +165,7 @@ return state; }
- return NULL; + return nullptr; }
static void southbridge_smi_gsmi(void) @@ -343,38 +343,38 @@ typedef void (*smi_handler_t)(void);
static const smi_handler_t southbridge_smi[32] = { - NULL, /* [0] reserved */ - NULL, /* [1] reserved */ - NULL, /* [2] BIOS_STS */ - NULL, /* [3] LEGACY_USB_STS */ + nullptr, /* [0] reserved */ + nullptr, /* [1] reserved */ + nullptr, /* [2] BIOS_STS */ + nullptr, /* [3] LEGACY_USB_STS */ southbridge_smi_sleep, /* [4] SLP_SMI_STS */ southbridge_smi_apmc, /* [5] APM_STS */ - NULL, /* [6] SWSMI_TMR_STS */ - NULL, /* [7] reserved */ + nullptr, /* [6] SWSMI_TMR_STS */ + nullptr, /* [7] reserved */ southbridge_smi_pm1, /* [8] PM1_STS */ southbridge_smi_gpe0, /* [9] GPE0_STS */ - NULL, /* [10] reserved */ - NULL, /* [11] reserved */ - NULL, /* [12] reserved */ + nullptr, /* [10] reserved */ + nullptr, /* [11] reserved */ + nullptr, /* [12] reserved */ southbridge_smi_tco, /* [13] TCO_STS */ southbridge_smi_periodic, /* [14] PERIODIC_STS */ - NULL, /* [15] SERIRQ_SMI_STS */ - NULL, /* [16] SMBUS_SMI_STS */ - NULL, /* [17] LEGACY_USB2_STS */ - NULL, /* [18] INTEL_USB2_STS */ - NULL, /* [19] reserved */ - NULL, /* [20] PCI_EXP_SMI_STS */ - NULL, /* [21] reserved */ - NULL, /* [22] reserved */ - NULL, /* [23] reserved */ - NULL, /* [24] reserved */ - NULL, /* [25] reserved */ - NULL, /* [26] SPI_STS */ - NULL, /* [27] reserved */ - NULL, /* [28] PUNIT */ - NULL, /* [29] GUNIT */ - NULL, /* [30] reserved */ - NULL /* [31] reserved */ + nullptr, /* [15] SERIRQ_SMI_STS */ + nullptr, /* [16] SMBUS_SMI_STS */ + nullptr, /* [17] LEGACY_USB2_STS */ + nullptr, /* [18] INTEL_USB2_STS */ + nullptr, /* [19] reserved */ + nullptr, /* [20] PCI_EXP_SMI_STS */ + nullptr, /* [21] reserved */ + nullptr, /* [22] reserved */ + nullptr, /* [23] reserved */ + nullptr, /* [24] reserved */ + nullptr, /* [25] reserved */ + nullptr, /* [26] SPI_STS */ + nullptr, /* [27] reserved */ + nullptr, /* [28] PUNIT */ + nullptr, /* [29] GUNIT */ + nullptr, /* [30] reserved */ + nullptr /* [31] reserved */ };
void southbridge_smi_handler(void) @@ -393,7 +393,7 @@ if (!(smi_sts & (1 << i))) continue;
- if (southbridge_smi[i] != NULL) { + if (southbridge_smi[i] != nullptr) { southbridge_smi[i](); } else { printk(BIOS_DEBUG, diff --git a/src/soc/intel/baytrail/southcluster.c b/src/soc/intel/baytrail/southcluster.c index 1afea59..4ab1d96 100644 --- a/src/soc/intel/baytrail/southcluster.c +++ b/src/soc/intel/baytrail/southcluster.c @@ -528,5 +528,5 @@ } }
-BOOT_STATE_INIT_ENTRY(BS_OS_RESUME, BS_ON_ENTRY, finalize_chipset, NULL); -BOOT_STATE_INIT_ENTRY(BS_PAYLOAD_LOAD, BS_ON_EXIT, finalize_chipset, NULL); +BOOT_STATE_INIT_ENTRY(BS_OS_RESUME, BS_ON_ENTRY, finalize_chipset, nullptr); +BOOT_STATE_INIT_ENTRY(BS_PAYLOAD_LOAD, BS_ON_EXIT, finalize_chipset, nullptr);