[coreboot-gerrit] Change in coreboot[master]: [WIP] superio/nuvoton/nct5572d: Program fan input divisors

[Angel Pons (Code Review)]

Angel Pons has uploaded this change for review. ( https://review.coreboot.org/c/coreboot/+/51031 )

Change subject: [WIP] superio/nuvoton/nct5572d: Program fan input divisors
......................................................................

[WIP] superio/nuvoton/nct5572d: Program fan input divisors

UNTESTED.

Change-Id: I149044d8a42fa6a42b841416c7b05e545ee939a9
Signed-off-by: Angel Pons 
---
M src/mainboard/asrock/e350m1/devicetree.cb
A src/superio/nuvoton/nct5572d/chip.h
M src/superio/nuvoton/nct5572d/superio.c
3 files changed, 61 insertions(+), 0 deletions(-)

git pull ssh://review.coreboot.org:29418/coreboot refs/changes/31/51031/1

diff --git a/src/mainboard/asrock/e350m1/devicetree.cb b/src/mainboard/asrock/e350m1/devicetree.cb
index c1740dc..87d0a34 100644
--- a/src/mainboard/asrock/e350m1/devicetree.cb
+++ b/src/mainboard/asrock/e350m1/devicetree.cb
@@ -74,6 +74,8 @@
    					io 0x60 = 0x290
    					io 0x62 = 0x0000 #  SB-TSI currently not implemented
    					irq 0x70 = 5
+						register "hwm_fan1_div" = "16"
+						register "hwm_fan2_div" = "4"
    				end
    				device pnp 2e.c off end #  PECI
    				device pnp 2e.d on #  SUSLED
diff --git a/src/superio/nuvoton/nct5572d/chip.h b/src/superio/nuvoton/nct5572d/chip.h
new file mode 100644
index 0000000..3be4ab0
--- /dev/null
+++ b/src/superio/nuvoton/nct5572d/chip.h
@@ -0,0 +1,15 @@
+/* SPDX-License-Identifier: GPL-2.0-or-later */
+
+#ifndef SUPERIO_NUVOTON_NCT5572D_CHIP_H
+#define SUPERIO_NUVOTON_NCT5572D_CHIP_H
+
+#include <stdint.h>
+
+struct superio_nuvoton_nct5572d_config {
+	uint8_t hwm_fan1_div;
+	uint8_t hwm_fan2_div;
+	uint8_t hwm_fan3_div;
+	uint8_t hwm_fan4_div;
+};
+
+#endif /* SUPERIO_NUVOTON_NCT5572D_CHIP_H */
diff --git a/src/superio/nuvoton/nct5572d/superio.c b/src/superio/nuvoton/nct5572d/superio.c
index c0a7118..10b31d1 100644
--- a/src/superio/nuvoton/nct5572d/superio.c
+++ b/src/superio/nuvoton/nct5572d/superio.c
@@ -4,16 +4,55 @@
 #include <device/device.h>
 #include <device/pnp.h>
 #include <pc80/keyboard.h>
+#include <lib.h>
 #include <option.h>
 #include <acpi/acpi.h>
 #include <superio/conf_mode.h>
+#include <superio/nuvoton/common/hwm.h>

+#include "chip.h"
 #include "nct5572d.h"

#define MAINBOARD_POWER_OFF	0
 #define MAINBOARD_POWER_ON	1
 #define MAINBOARD_POWER_KEEP	2

+static void nct5572d_hwm_setup(struct device *dev)
+{
+	uint16_t hwm_base = 0;
+	uint8_t reg8;
+
+	hwm_base |= (uint16_t)pnp_read_config(dev, PNP_IDX_IO0 + 0) << 8;
+	hwm_base |= (uint16_t)pnp_read_config(dev, PNP_IDX_IO0 + 1) << 0;
+
+	if (!hwm_base)
+		return;
+
+	const struct superio_nuvoton_nct5572d_config *config = config_of(dev);
+
+	nuvoton_hwm_select_bank(hwm_base, 5);
+
+	reg8 = 0;
+
+	if (config->hwm_fan1_div)
+		reg8 |= (log2(config->hwm_fan1_div) & 0x7) << 0;
+
+	if (config->hwm_fan2_div)
+		reg8 |= (log2(config->hwm_fan2_div) & 0x7) << 4;
+
+	pnp_write_hwm5_index(hwm_base, 0x06, reg8);
+
+	reg8 = 0;
+
+	if (config->hwm_fan3_div)
+		reg8 |= (log2(config->hwm_fan3_div) & 0x7) << 0;
+
+	if (config->hwm_fan4_div)
+		reg8 |= (log2(config->hwm_fan4_div) & 0x7) << 4;
+
+	pnp_write_hwm5_index(hwm_base, 0x07, reg8);
+}
+
 static void nct5572d_init(struct device *dev)
 {
    uint8_t byte;
@@ -61,6 +100,11 @@
    	pnp_exit_conf_mode(dev);
    	printk(BIOS_INFO, "set power %s after power fail\n", power_status ? "on" : "off");
    	break;
+	case NCT5572D_HWM_TSI_FPLED:
+		pnp_enter_conf_mode(dev);
+		nct5572d_hwm_setup(dev);
+		pnp_exit_conf_mode(dev);
+		break;
    }
 }