Eric Lai has submitted this change. ( https://review.coreboot.org/c/coreboot/+/76110?usp=email )
Change subject: mb/google/rex: Set TCC to 90°C ......................................................................
mb/google/rex: Set TCC to 90°C
Set tcc_offset value to 20 in devicetree for Thermal Control Circuit (TCC) activation feature for rex variants.
BUG=b:270664854 BRANCH=None TEST=Build FW and test on rex board
Change-Id: I0567b6240fcb53f38158c381b700169475cf3795 Signed-off-by: Sumeet Pawnikar sumeet.r.pawnikar@intel.com Reviewed-on: https://review.coreboot.org/c/coreboot/+/76110 Reviewed-by: Kapil Porwal kapilporwal@google.com Reviewed-by: Eric Lai eric_lai@quanta.corp-partner.google.com Tested-by: build bot (Jenkins) no-reply@coreboot.org Reviewed-by: Subrata Banik subratabanik@google.com --- M src/mainboard/google/rex/variants/baseboard/rex/devicetree.cb 1 file changed, 3 insertions(+), 0 deletions(-)
Approvals: Kapil Porwal: Looks good to me, approved build bot (Jenkins): Verified Subrata Banik: Looks good to me, approved Eric Lai: Looks good to me, approved
diff --git a/src/mainboard/google/rex/variants/baseboard/rex/devicetree.cb b/src/mainboard/google/rex/variants/baseboard/rex/devicetree.cb index 0d639e3..7acc0ae 100644 --- a/src/mainboard/google/rex/variants/baseboard/rex/devicetree.cb +++ b/src/mainboard/google/rex/variants/baseboard/rex/devicetree.cb @@ -36,6 +36,9 @@ # DPTF enable register "dptf_enable" = "1"
+ # Temporary setting TCC of 90C = Tj max (110) - TCC_Offset (20) + register "tcc_offset" = "20" + # Enable CNVi BT register "cnvi_bt_core" = "true"