Raul Rangel has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/42687 )
Change subject: soc/amd/common: Refactor GPIO SCI/SMI interrupts ......................................................................
Patch Set 8: Code-Review+2
(3 comments)
https://review.coreboot.org/c/coreboot/+/42687/5/src/soc/amd/common/block/gp... File src/soc/amd/common/block/gpio_banks/gpio.c:
https://review.coreboot.org/c/coreboot/+/42687/5/src/soc/amd/common/block/gp... PS5, Line 52: sci_trigger_regs
Left as a followup exercise due the requested change of name 'level' to 'trigger' which calls for a […]
Ack
https://review.coreboot.org/c/coreboot/+/42687/5/src/soc/amd/common/block/gp... PS5, Line 55: level
And have a field named trigger not being written to register named trigger? I find that equally conf […]
Ack
https://review.coreboot.org/c/coreboot/+/42687/5/src/soc/amd/common/block/gp... PS5, Line 94: SMI_SCI_LEVEL
Not my choice. I have assumed these match the datasheets.
Ack