Attention is currently required from: Jason Glenesk, Raul Rangel, Martin Roth, Marshall Dawson, Paul Menzel, Zheng Bao, Karthik Ramasubramanian.
Bao Zheng has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/51029 )
Change subject: soc/amd/cezanne: Initialize I2C
......................................................................
Patch Set 12:
(1 comment)
File src/soc/amd/cezanne/Makefile.inc:
https://review.coreboot.org/c/coreboot/+/51029/comment/dcbe03b9_b815c4c9
PS10, Line 21: verstage_x86-y += uart.c
Not required in verstage_x86? […]
Done.
Move TO the previous CL.
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