Attention is currently required from: Patrick Rudolph. Angel Pons has uploaded this change for review. ( https://review.coreboot.org/c/coreboot/+/58221 )
Change subject: soc/intel/cannonlake: Enable Energy/Performance Bias control ......................................................................
soc/intel/cannonlake: Enable Energy/Performance Bias control
Set POWER_CTL MSR bit 18 to enable Energy/Performance Bias control.
Change-Id: Ibd1db77b5b63cb6e2b0ad9d2f79caa2f3b576ead Signed-off-by: Angel Pons th3fanbus@gmail.com --- M src/soc/intel/cannonlake/cpu.c 1 file changed, 1 insertion(+), 0 deletions(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/21/58221/1
diff --git a/src/soc/intel/cannonlake/cpu.c b/src/soc/intel/cannonlake/cpu.c index 99fcadd..8c8cad0 100644 --- a/src/soc/intel/cannonlake/cpu.c +++ b/src/soc/intel/cannonlake/cpu.c @@ -51,6 +51,7 @@ /* Enable PROCHOT */ msr = rdmsr(MSR_POWER_CTL); msr.lo |= (1 << 0); /* Enable Bi-directional PROCHOT as an input */ + msr.lo |= (1 << 18); /* Enable Energy/Performance Bias control */ msr.lo |= (1 << 23); /* Lock it */ wrmsr(MSR_POWER_CTL, msr); }