29 Jun
2023
29 Jun
'23
7:42 a.m.
Attention is currently required from: Paul Menzel, Werner Zeh.
Mario Scheithauer has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/76175?usp=email )
Change subject: mb/siemens/mc_apl5: Correct the Tx signal from SATA port 0 ......................................................................
Patch Set 2:
(1 comment)
Commit Message:
https://review.coreboot.org/c/coreboot/+/76175/comment/8e4f6949_fea4d65c : PS1, Line 11: appropriate value
_ of 0. […]
Done
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Gerrit-Project: coreboot
Gerrit-Branch: master
Gerrit-Change-Id: I965960004ca44f1b37b16ce6484000fa7fd8ad90
Gerrit-Change-Number: 76175
Gerrit-PatchSet: 2
Gerrit-Owner: Mario Scheithauer mario.scheithauer@siemens.com
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