[coreboot-gerrit] Patch merged into coreboot/master: d988b61 bolt: Set GPIO29 as input in S0, output+high in S3/S5

the following patch was just integrated into master:
commit d988b612c76cb34f689c567e9e983e496f65008a
Author: Duncan Laurie 
Date:   Wed Sep 25 14:05:31 2013 -0700

bolt: Set GPIO29 as input in S0, output+high in S3/S5

This resolves WiFi issues after suspend/resume.

It needs related SPI descriptor soft strap change to
    enable SLP_WLAN as a GPIO instead of owned by the ME.

Change-Id: I03f4458d1e52a913770d391061baa6cfa41e8558
    Signed-off-by: Duncan Laurie 
    Reviewed-on: https://chromium-review.googlesource.com/170577
    Reviewed-by: Aaron Durbin 
    (cherry picked from commit cf1fe0524ad4793c8c422dc3fed3007b7fc96038)
    Signed-off-by: Isaac Christensen 
    Reviewed-on: http://review.coreboot.org/6533
    Tested-by: build bot (Jenkins)
    Reviewed-by: Ronald G. Minnich 
    Reviewed-by: Edward O'Callaghan

See http://review.coreboot.org/6533 for details.

-gerrit