Stefan Reinauer (stefan.reinauer@coreboot.org) just uploaded a new patch set to gerrit, which you can find at http://review.coreboot.org/4198
-gerrit
commit c689575db2efdc7696206676464d897a3a3f341a Author: Duncan Laurie dlaurie@chromium.org Date: Tue May 28 08:32:21 2013 -0700
falco: Update DIMM SPD table
RAM_ID indices have been changed and settled on a 2GB config that will be the same DRAM chips but only used in one channel.
Change-Id: I444e655883ae045622ab3dfb964da4d7f86e1c0d Signed-off-by: Duncan Laurie dlaurie@chromium.org Reviewed-on: https://gerrit.chromium.org/gerrit/56810 Reviewed-by: Aaron Durbin adurbin@chromium.org --- src/mainboard/google/falco/Makefile.inc | 9 ++++++--- src/mainboard/google/falco/romstage.c | 6 ++++++ 2 files changed, 12 insertions(+), 3 deletions(-)
diff --git a/src/mainboard/google/falco/Makefile.inc b/src/mainboard/google/falco/Makefile.inc index e19db11..edb8cf6 100644 --- a/src/mainboard/google/falco/Makefile.inc +++ b/src/mainboard/google/falco/Makefile.inc @@ -28,9 +28,12 @@ smm-$(CONFIG_HAVE_SMI_HANDLER) += smihandler.c SPD_BIN = $(obj)/spd.bin
# Order of names in SPD_SOURCES is important! -SPD_SOURCES = Hynix_HMT425S6AFR6A -SPD_SOURCES += Micron_4KTF25664HZ -SPD_SOURCES += Elpida_EDJ4216EFBG +SPD_SOURCES = Micron_4KTF25664HZ # 4GB / CH0 + CH1 +SPD_SOURCES += Hynix_HMT425S6AFR6A # 4GB / CH0 + CH1 +SPD_SOURCES += Elpida_EDJ4216EFBG # 4GB / CH0 + CH1 +SPD_SOURCES += Micron_4KTF25664HZ # 2GB / CH0 only +SPD_SOURCES += Hynix_HMT425S6AFR6A # 2GB / CH0 only +SPD_SOURCES += Elpida_EDJ4216EFBG # 2GB / CH0 only
SPD_DEPS := $(foreach f, $(SPD_SOURCES), src/mainboard/$(MAINBOARDDIR)/$(f).spd.hex)
diff --git a/src/mainboard/google/falco/romstage.c b/src/mainboard/google/falco/romstage.c index 3bf1dbd..ef6a849 100644 --- a/src/mainboard/google/falco/romstage.c +++ b/src/mainboard/google/falco/romstage.c @@ -91,6 +91,12 @@ static void copy_spd(struct pei_data *peid) if (spd_file->len < sizeof(peid->spd_data[0])) die("Missing SPD data.");
+ /* Index 0-2 are 4GB config with both CH0 and CH1 + * Index 3-5 are 2GB config with CH0 only + */ + if (spd_index > 2) + peid->dimm_channel1_disabled = 3; + memcpy(peid->spd_data[0], ((char*)CBFS_SUBHEADER(spd_file)) + spd_index * sizeof(peid->spd_data[0]),