Attention is currently required from: Arthur Heymans, Christian Walter, Felix Singer, Johnny Lin, Lean Sheng Tan, Paul Menzel, Tim Chu, Ziang Wang.
Nico Huber has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/75741?usp=email )
Change subject: soc/intel/spr-sp: Remove HWP related settings
......................................................................
Patch Set 2:
(2 comments)
Patchset:
PS2:
Then why do you give a +1?
That was already answered: "dont want to over engineering it. What do the rest
think?". That's basically what the description of +1 says "Somebody else must
approve".
However, I think using an abstract UPD interface for a rather simple thing
(if it's as simple as the current implementation) seems like the actual over
engineering.
PS2:
What's the advantage of letting FSP doing it?
Usually I would say peace for coreboot developers, because multiple places to
configure something and conflicting settings can cause a lot of trouble.
However, coreboot currently doesn't expose the `CpuPmProcessorHWPMEnable` UPD.
And this change doesn't even have a follow-up that would make use of it. So
the change alone seems odd.
IMO, such things are much easier discussed when the whole implementation is
visible on Gerrit. This change alone changes behavior and we don't even know
to what (if coreboot doesn't set the UPD).
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