[coreboot-gerrit] Change in coreboot[master]: mb/amd/mandolin: move PCIe GPP clock setting to devicetree

[Patrick Georgi (Code Review)]

Patrick Georgi has submitted this change. ( https://review.coreboot.org/c/coreboot/+/44892 )

Change subject: mb/amd/mandolin: move PCIe GPP clock setting to devicetree
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mb/amd/mandolin: move PCIe GPP clock setting to devicetree

Checked with the schematics that all PCIe clocks have a corresponding
clock enable pin.

BUG=b:149970243
BRANCH=zork

Change-Id: If96cdf95e213682217e46a98fc69c5c2ef4a148d
Signed-off-by: Felix Held 
Reviewed-on: https://review.coreboot.org/c/coreboot/+/44892
Reviewed-by: Aaron Durbin 
Tested-by: build bot (Jenkins) 
---
M src/mainboard/amd/mandolin/variants/mandolin/devicetree.cb
1 file changed, 9 insertions(+), 0 deletions(-)

Approvals:
  build bot (Jenkins): Verified
  Aaron Durbin: Looks good to me, approved

diff --git a/src/mainboard/amd/mandolin/variants/mandolin/devicetree.cb b/src/mainboard/amd/mandolin/variants/mandolin/devicetree.cb
index 0004ecd..c603130 100644
--- a/src/mainboard/amd/mandolin/variants/mandolin/devicetree.cb
+++ b/src/mainboard/amd/mandolin/variants/mandolin/devicetree.cb
@@ -115,6 +115,15 @@
    	.flash_ch_en = 0,
    }"

+	# genral purpose PCIe clock output configuration
+	register "gpp_clk_config[0]" = "GPP_CLK_REQ"
+	register "gpp_clk_config[1]" = "GPP_CLK_REQ"
+	register "gpp_clk_config[2]" = "GPP_CLK_REQ"
+	register "gpp_clk_config[3]" = "GPP_CLK_REQ"
+	register "gpp_clk_config[4]" = "GPP_CLK_REQ"
+	register "gpp_clk_config[5]" = "GPP_CLK_REQ"
+	register "gpp_clk_config[6]" = "GPP_CLK_REQ"
+
    device cpu_cluster 0 on
    	device lapic 0 on end
    end