Attention is currently required from: Dinesh Gehlot, Jayvik Desai, Kapil Porwal, Karthik Ramasubramanian, Matt DeVillier, Nick Vaccaro, Rishika Raj.
Subrata Banik has posted comments on this change by Subrata Banik. ( https://review.coreboot.org/c/coreboot/+/84365?usp=email )
Change subject: soc/intel/alderlake: Enable CRASHLOG for Chrome OS ......................................................................
Patch Set 1:
(1 comment)
File src/soc/intel/alderlake/Kconfig:
https://review.coreboot.org/c/coreboot/+/84365/comment/c178528a_4ecddeb9?usp... : PS1, Line 87: MAINBOARD_HAS_CHROMEOS
while this is consistent with the previous behavior, I'm not sure why you want to move it to the SoC code, rather than select it in the mainboard(s) only for ChromeOS
There are three main reasons to move Crashlog into the System-on-a-Chip (SoC) codebase:
1. Crashlog is a SoC feature, so it makes sense for the control knobs to stay within the SoC code. If a board doesn't want to use Crashlog, it can simply unsubscribe from it.
2. Using the SoC Kconfig allows us to support a wider range of boards without requiring each baseboard or variant to select the Crashlog Kconfig. For example, multiple vendors are making boards for Alder Lake (ADL), and asking each mainboard to select Crashlog features would lead to unnecessary duplication.
3. Maintaining consistent behavior with the latest SoCs MTL and PTL is important. Intel recommends that we enable Crashlog by default.