Michael Niewöhner has submitted this change. ( https://review.coreboot.org/c/coreboot/+/46149 )
Change subject: mb/amd/parmer: Convert to ASL 2.0 syntax ......................................................................
mb/amd/parmer: Convert to ASL 2.0 syntax
Change-Id: I563cd549858429049223677ebc503f9c9304baa0 Signed-off-by: Elyes HAOUAS ehaouas@noos.fr Reviewed-on: https://review.coreboot.org/c/coreboot/+/46149 Reviewed-by: Michael Niewöhner foss@mniewoehner.de Tested-by: build bot (Jenkins) no-reply@coreboot.org --- M src/mainboard/amd/parmer/acpi/sleep.asl 1 file changed, 8 insertions(+), 8 deletions(-)
Approvals: build bot (Jenkins): Verified Michael Niewöhner: Looks good to me, approved
diff --git a/src/mainboard/amd/parmer/acpi/sleep.asl b/src/mainboard/amd/parmer/acpi/sleep.asl index dde9c37..cd714ce 100644 --- a/src/mainboard/amd/parmer/acpi/sleep.asl +++ b/src/mainboard/amd/parmer/acpi/sleep.asl @@ -26,20 +26,20 @@ /* DBGO("\n") */
/* Clear sleep SMI status flag and enable sleep SMI trap. */ - /*Store(One, CSSM) - Store(One, SSEN)*/ + /*CSSM = 1 + SSEN = 1*/
/* On older chips, clear PciExpWakeDisEn */ - /*if (LLessEqual(_SB.SBRI, 0x13)) { - * Store(0,_SB.PWDE) + /*if (_SB.SBRI <= 0x13) { + * _SB.PWDE = 0 *} */
/* Clear wake status structure. */ - Store(0, Index(WKST,0)) - Store(0, Index(WKST,1)) + WKST [0] = 0 + WKST [1] = 0
- Store (0x07, UPWS) + UPWS = 0x07 } /* End Method(_PTS) */
/* @@ -64,7 +64,7 @@ /* DBGO(" to S0\n") */
/* Re-enable HPET */ - Store(1,USBS) + USBS = 1
Return(WKST) } /* End Method(_WAK) */