build bot (Jenkins) has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/46878 )
Change subject: soc/mediatek/mt8192: add clkbuf and srclken_rc MT6359P driver ......................................................................
Patch Set 9:
(146 comments)
https://review.coreboot.org/c/coreboot/+/46878/9/src/soc/mediatek/mt8192/clk... File src/soc/mediatek/mt8192/clkbuf.c:
https://review.coreboot.org/c/coreboot/+/46878/9/src/soc/mediatek/mt8192/clk... PS9, Line 237: clkbuf_writel_ap(PMIFSPI_DCXO_CMD_ADDR0, PMIC_DCXO_CW00_CLR_ADDR | (PMIC_DCXO_CW00_SET_ADDR << DCXO_CMD_ADDR0_1_SHFT)); line over 96 characters
https://review.coreboot.org/c/coreboot/+/46878/9/src/soc/mediatek/mt8192/clk... PS9, Line 238: clkbuf_writel_ap(PMIFSPI_DCXO_CMD_WDATA0, (PMIC_XO_EXTBUF2_EN_M_MASK << PMIC_XO_EXTBUF2_EN_M_SHIFT) line over 96 characters
https://review.coreboot.org/c/coreboot/+/46878/9/src/soc/mediatek/mt8192/clk... PS9, Line 239: | (PMIC_XO_EXTBUF2_EN_M_MASK << PMIC_XO_EXTBUF2_EN_M_SHIFT) << DCXO_CMD_WDATA0_1_SHFT ); line over 96 characters
https://review.coreboot.org/c/coreboot/+/46878/9/src/soc/mediatek/mt8192/clk... PS9, Line 239: | (PMIC_XO_EXTBUF2_EN_M_MASK << PMIC_XO_EXTBUF2_EN_M_SHIFT) << DCXO_CMD_WDATA0_1_SHFT ); space prohibited before that close parenthesis ')'
https://review.coreboot.org/c/coreboot/+/46878/9/src/soc/mediatek/mt8192/clk... PS9, Line 241: clkbuf_writel_ap(PMIFSPI_DCXO_CMD_ADDR0, PMIC_RG_SRCLKEN_IN3_EN_ADDR | (PMIC_RG_SRCLKEN_IN3_EN_ADDR << DCXO_CMD_ADDR0_1_SHFT)); line over 96 characters
https://review.coreboot.org/c/coreboot/+/46878/9/src/soc/mediatek/mt8192/clk... PS9, Line 243: | (1 << PMIC_RG_SRCLKEN_IN3_EN_SHIFT) << DCXO_CMD_WDATA0_1_SHFT ); space prohibited before that close parenthesis ')'
https://review.coreboot.org/c/coreboot/+/46878/9/src/soc/mediatek/mt8192/clk... PS9, Line 248: clkbuf_writel_ap(PMIFSPI_DCXO_CMD_ADDR1, PMIC_DCXO_CW00_CLR_ADDR | (PMIC_DCXO_CW00_SET_ADDR << DCXO_CMD_ADDR0_1_SHFT)); line over 96 characters
https://review.coreboot.org/c/coreboot/+/46878/9/src/soc/mediatek/mt8192/clk... PS9, Line 249: clkbuf_writel_ap(PMIFSPI_DCXO_CMD_WDATA1, (PMIC_XO_EXTBUF3_EN_M_MASK << PMIC_XO_EXTBUF3_EN_M_SHIFT) line over 96 characters
https://review.coreboot.org/c/coreboot/+/46878/9/src/soc/mediatek/mt8192/clk... PS9, Line 250: | (PMIC_XO_EXTBUF3_EN_M_MASK << PMIC_XO_EXTBUF3_EN_M_SHIFT) << DCXO_CMD_WDATA0_1_SHFT ); line over 96 characters
https://review.coreboot.org/c/coreboot/+/46878/9/src/soc/mediatek/mt8192/clk... PS9, Line 250: | (PMIC_XO_EXTBUF3_EN_M_MASK << PMIC_XO_EXTBUF3_EN_M_SHIFT) << DCXO_CMD_WDATA0_1_SHFT ); space prohibited before that close parenthesis ')'
https://review.coreboot.org/c/coreboot/+/46878/9/src/soc/mediatek/mt8192/inc... File src/soc/mediatek/mt8192/include/soc/srclken_rc.h:
https://review.coreboot.org/c/coreboot/+/46878/9/src/soc/mediatek/mt8192/inc... PS9, Line 162: #define RC_32K_DCM_MSK 0x1 please, no space before tabs
https://review.coreboot.org/c/coreboot/+/46878/9/src/soc/mediatek/mt8192/inc... PS9, Line 341: CHN_MD= 3, spaces required around that '=' (ctx:VxW)
https://review.coreboot.org/c/coreboot/+/46878/9/src/soc/mediatek/mt8192/pmi... File src/soc/mediatek/mt8192/pmif.c:
https://review.coreboot.org/c/coreboot/+/46878/9/src/soc/mediatek/mt8192/pmi... PS9, Line 198: if(PMIF_VLD_RDY == mode){ space required before the open brace '{'
https://review.coreboot.org/c/coreboot/+/46878/9/src/soc/mediatek/mt8192/pmi... PS9, Line 198: if(PMIF_VLD_RDY == mode){ Comparisons should place the constant on the right side of the test
https://review.coreboot.org/c/coreboot/+/46878/9/src/soc/mediatek/mt8192/pmi... PS9, Line 198: if(PMIF_VLD_RDY == mode){ space required before the open parenthesis '('
https://review.coreboot.org/c/coreboot/+/46878/9/src/soc/mediatek/mt8192/pmi... PS9, Line 200: spi_sleep_ctrl = (spi_sleep_ctrl & ~(PMIFSPI_SPM_SLEEP_REQ_SEL_MSK << PMIFSPI_SPM_SLEEP_REQ_SEL_SHFT)) line over 96 characters
https://review.coreboot.org/c/coreboot/+/46878/9/src/soc/mediatek/mt8192/pmi... PS9, Line 202: spi_sleep_ctrl = (spi_sleep_ctrl & ~(PMIFSPI_SCP_SLEEP_REQ_SEL_MSK << PMIFSPI_SCP_SLEEP_REQ_SEL_SHFT)) line over 96 characters
https://review.coreboot.org/c/coreboot/+/46878/9/src/soc/mediatek/mt8192/pmi... PS9, Line 205: spmi_sleep_ctrl = (spmi_sleep_ctrl & ~(PMIFSPMI_SPM_SLEEP_REQ_SEL_MSK << PMIFSPMI_SPM_SLEEP_REQ_SEL_SHFT)) line over 96 characters
https://review.coreboot.org/c/coreboot/+/46878/9/src/soc/mediatek/mt8192/pmi... PS9, Line 207: spmi_sleep_ctrl = (spmi_sleep_ctrl & ~(PMIFSPMI_SCP_SLEEP_REQ_SEL_MSK << PMIFSPMI_SCP_SLEEP_REQ_SEL_SHFT)) line over 96 characters
https://review.coreboot.org/c/coreboot/+/46878/9/src/soc/mediatek/mt8192/pmi... PS9, Line 210: spi_mode_ctrl = (spi_mode_ctrl & ~(PMIFSPI_MD_CTL_PMIF_RDY_MSK << PMIFSPI_MD_CTL_PMIF_RDY_SHFT)) line over 96 characters
https://review.coreboot.org/c/coreboot/+/46878/9/src/soc/mediatek/mt8192/pmi... PS9, Line 213: spi_mode_ctrl = (spi_mode_ctrl & ~(PMIFSPI_MD_CTL_SRCLK_EN_MSK << PMIFSPI_MD_CTL_SRCLK_EN_SHFT)) line over 96 characters
https://review.coreboot.org/c/coreboot/+/46878/9/src/soc/mediatek/mt8192/pmi... PS9, Line 216: spi_mode_ctrl = (spi_mode_ctrl & ~(PMIFSPI_MD_CTL_SRVOL_EN_MSK << PMIFSPI_MD_CTL_SRVOL_EN_SHFT)) line over 96 characters
https://review.coreboot.org/c/coreboot/+/46878/9/src/soc/mediatek/mt8192/pmi... PS9, Line 218: spmi_mode_ctrl = (spmi_mode_ctrl & ~(PMIFSPMI_MD_CTL_PMIF_RDY_MSK << PMIFSPMI_MD_CTL_PMIF_RDY_SHFT)) line over 96 characters
https://review.coreboot.org/c/coreboot/+/46878/9/src/soc/mediatek/mt8192/pmi... PS9, Line 220: spmi_mode_ctrl = (spmi_mode_ctrl & ~(PMIFSPMI_MD_CTL_SRCLK_EN_MSK << PMIFSPMI_MD_CTL_SRCLK_EN_SHFT)) line over 96 characters
https://review.coreboot.org/c/coreboot/+/46878/9/src/soc/mediatek/mt8192/pmi... PS9, Line 222: spmi_mode_ctrl = (spmi_mode_ctrl & ~(PMIFSPMI_MD_CTL_SRVOL_EN_MSK << PMIFSPMI_MD_CTL_SRVOL_EN_SHFT)) line over 96 characters
https://review.coreboot.org/c/coreboot/+/46878/9/src/soc/mediatek/mt8192/pmi... PS9, Line 226: inf_en = (inf_en & ~(PMIFSPI_INF_EN_SRCLKEN_RC_HW_MSK << PMIFSPI_INF_EN_SRCLKEN_RC_HW_SHFT)) line over 96 characters
https://review.coreboot.org/c/coreboot/+/46878/9/src/soc/mediatek/mt8192/pmi... PS9, Line 230: other_inf_en = (other_inf_en & ~(PMIFSPI_OTHER_INF_DXCO0_EN_MSK << PMIFSPI_OTHER_INF_DXCO0_EN_SHFT)) line over 96 characters
https://review.coreboot.org/c/coreboot/+/46878/9/src/soc/mediatek/mt8192/pmi... PS9, Line 232: other_inf_en = (other_inf_en & ~(PMIFSPI_OTHER_INF_DXCO1_EN_MSK << PMIFSPI_OTHER_INF_DXCO1_EN_SHFT)) line over 96 characters
https://review.coreboot.org/c/coreboot/+/46878/9/src/soc/mediatek/mt8192/pmi... PS9, Line 235: arb_en = (arb_en & ~(PMIFSPI_ARB_EN_SRCLKEN_RC_HW_MSK << PMIFSPI_ARB_EN_SRCLKEN_RC_HW_SHFT)) line over 96 characters
https://review.coreboot.org/c/coreboot/+/46878/9/src/soc/mediatek/mt8192/pmi... PS9, Line 237: arb_en = (arb_en & ~(PMIFSPI_ARB_EN_DCXO_CONN_MSK << PMIFSPI_ARB_EN_DCXO_CONN_SHFT)) line over 96 characters
https://review.coreboot.org/c/coreboot/+/46878/9/src/soc/mediatek/mt8192/pmi... PS9, Line 239: arb_en = (arb_en & ~(PMIFSPI_ARB_EN_DCXO_NFC_MSK << PMIFSPI_ARB_EN_DCXO_NFC_SHFT)) line over 96 characters
https://review.coreboot.org/c/coreboot/+/46878/9/src/soc/mediatek/mt8192/pmi... PS9, Line 242: } else if (PMIF_SLP_REQ == mode) { Comparisons should place the constant on the right side of the test
https://review.coreboot.org/c/coreboot/+/46878/9/src/soc/mediatek/mt8192/pmi... PS9, Line 245: spi_sleep_ctrl = (spi_sleep_ctrl & ~(PMIFSPI_SPM_SLEEP_REQ_SEL_MSK << PMIFSPI_SPM_SLEEP_REQ_SEL_SHFT)) line over 96 characters
https://review.coreboot.org/c/coreboot/+/46878/9/src/soc/mediatek/mt8192/pmi... PS9, Line 247: spi_sleep_ctrl = (spi_sleep_ctrl & ~(PMIFSPI_SCP_SLEEP_REQ_SEL_MSK << PMIFSPI_SCP_SLEEP_REQ_SEL_SHFT)) line over 96 characters
https://review.coreboot.org/c/coreboot/+/46878/9/src/soc/mediatek/mt8192/pmi... PS9, Line 250: spmi_sleep_ctrl = (spmi_sleep_ctrl & ~(PMIFSPMI_SPM_SLEEP_REQ_SEL_MSK << PMIFSPMI_SPM_SLEEP_REQ_SEL_SHFT)) line over 96 characters
https://review.coreboot.org/c/coreboot/+/46878/9/src/soc/mediatek/mt8192/pmi... PS9, Line 252: spmi_sleep_ctrl = (spmi_sleep_ctrl & ~(PMIFSPMI_SCP_SLEEP_REQ_SEL_MSK << PMIFSPMI_SCP_SLEEP_REQ_SEL_SHFT)) line over 96 characters
https://review.coreboot.org/c/coreboot/+/46878/9/src/soc/mediatek/mt8192/pmi... PS9, Line 256: spi_mode_ctrl = (spi_mode_ctrl & ~(PMIFSPI_MD_CTL_PMIF_RDY_MSK << PMIFSPI_MD_CTL_PMIF_RDY_SHFT)) line over 96 characters
https://review.coreboot.org/c/coreboot/+/46878/9/src/soc/mediatek/mt8192/pmi... PS9, Line 259: spi_mode_ctrl = (spi_mode_ctrl & ~(PMIFSPI_MD_CTL_SRCLK_EN_MSK << PMIFSPI_MD_CTL_SRCLK_EN_SHFT)) line over 96 characters
https://review.coreboot.org/c/coreboot/+/46878/9/src/soc/mediatek/mt8192/pmi... PS9, Line 262: spi_mode_ctrl = (spi_mode_ctrl & ~(PMIFSPI_MD_CTL_SRVOL_EN_MSK << PMIFSPI_MD_CTL_SRVOL_EN_SHFT)) line over 96 characters
https://review.coreboot.org/c/coreboot/+/46878/9/src/soc/mediatek/mt8192/pmi... PS9, Line 265: spmi_mode_ctrl = (spmi_mode_ctrl & ~(PMIFSPMI_MD_CTL_PMIF_RDY_MSK << PMIFSPMI_MD_CTL_PMIF_RDY_SHFT)) line over 96 characters
https://review.coreboot.org/c/coreboot/+/46878/9/src/soc/mediatek/mt8192/pmi... PS9, Line 267: spmi_mode_ctrl = (spmi_mode_ctrl & ~(PMIFSPMI_MD_CTL_SRCLK_EN_MSK << PMIFSPMI_MD_CTL_SRCLK_EN_SHFT)) line over 96 characters
https://review.coreboot.org/c/coreboot/+/46878/9/src/soc/mediatek/mt8192/pmi... PS9, Line 269: spmi_mode_ctrl = (spmi_mode_ctrl & ~(PMIFSPMI_MD_CTL_SRVOL_EN_MSK << PMIFSPMI_MD_CTL_SRVOL_EN_SHFT)) line over 96 characters
https://review.coreboot.org/c/coreboot/+/46878/9/src/soc/mediatek/mt8192/pmi... PS9, Line 273: inf_en = (inf_en & ~(PMIFSPI_INF_EN_SRCLKEN_RC_HW_MSK << PMIFSPI_INF_EN_SRCLKEN_RC_HW_SHFT)) line over 96 characters
https://review.coreboot.org/c/coreboot/+/46878/9/src/soc/mediatek/mt8192/pmi... PS9, Line 276: other_inf_en = (other_inf_en & ~(PMIFSPI_OTHER_INF_DXCO0_EN_MSK << PMIFSPI_OTHER_INF_DXCO0_EN_SHFT)) line over 96 characters
https://review.coreboot.org/c/coreboot/+/46878/9/src/soc/mediatek/mt8192/pmi... PS9, Line 278: other_inf_en = (other_inf_en & ~(PMIFSPI_OTHER_INF_DXCO1_EN_MSK << PMIFSPI_OTHER_INF_DXCO1_EN_SHFT)) line over 96 characters
https://review.coreboot.org/c/coreboot/+/46878/9/src/soc/mediatek/mt8192/pmi... PS9, Line 281: /*srclken dissable, dcxo0,1 enable*/ 'dissable' may be misspelled - perhaps 'disable'?
https://review.coreboot.org/c/coreboot/+/46878/9/src/soc/mediatek/mt8192/pmi... PS9, Line 282: arb_en = (arb_en & ~(PMIFSPI_ARB_EN_SRCLKEN_RC_HW_MSK << PMIFSPI_ARB_EN_SRCLKEN_RC_HW_SHFT)) line over 96 characters
https://review.coreboot.org/c/coreboot/+/46878/9/src/soc/mediatek/mt8192/pmi... PS9, Line 284: arb_en = (arb_en & ~(PMIFSPI_ARB_EN_DCXO_CONN_MSK << PMIFSPI_ARB_EN_DCXO_CONN_SHFT)) line over 96 characters
https://review.coreboot.org/c/coreboot/+/46878/9/src/soc/mediatek/mt8192/pmi... PS9, Line 286: arb_en = (arb_en & ~(PMIFSPI_ARB_EN_DCXO_NFC_MSK << PMIFSPI_ARB_EN_DCXO_NFC_SHFT)) line over 96 characters
https://review.coreboot.org/c/coreboot/+/46878/9/src/soc/mediatek/mt8192/pmi... PS9, Line 301: void pmwrap_interface_init(void){ open brace '{' following function definitions go on the next line
https://review.coreboot.org/c/coreboot/+/46878/9/src/soc/mediatek/mt8192/src... File src/soc/mediatek/mt8192/srclken_rc.c:
https://review.coreboot.org/c/coreboot/+/46878/9/src/soc/mediatek/mt8192/src... PS9, Line 15: /*#define NO_DCXO_XO_CHN ((1 << CHN_COANT) | (1 << CHN_SCP) | (1 << CHN_RESERVE))*/ line over 96 characters
https://review.coreboot.org/c/coreboot/+/46878/9/src/soc/mediatek/mt8192/src... PS9, Line 28: #define INIT_SUBSYS_FPM_TO_LPM ( 1 << CHN_RF | 1 << CHN_DEEPIDLE \ space prohibited after that open parenthesis '('
https://review.coreboot.org/c/coreboot/+/46878/9/src/soc/mediatek/mt8192/src... PS9, Line 29: | 1 << CHN_MD | 1 << CHN_GPS | 1 <<CHN_BT \ need consistent spacing around '<<' (ctx:WxV)
https://review.coreboot.org/c/coreboot/+/46878/9/src/soc/mediatek/mt8192/src... PS9, Line 34: #define INIT_SUBSYS_FPM_TO_BBLPM ( 1 << CHN_DEEPIDLE) space prohibited after that open parenthesis '('
https://review.coreboot.org/c/coreboot/+/46878/9/src/soc/mediatek/mt8192/src... PS9, Line 36: #define INIT_SUBSYS_TO_HW ( 1 << CHN_SUSPEND | 1 << CHN_RF | 1 << CHN_DEEPIDLE \ space prohibited after that open parenthesis '('
https://review.coreboot.org/c/coreboot/+/46878/9/src/soc/mediatek/mt8192/src... PS9, Line 37: | 1 << CHN_GPS | 1 <<CHN_BT \ need consistent spacing around '<<' (ctx:WxV)
https://review.coreboot.org/c/coreboot/+/46878/9/src/soc/mediatek/mt8192/src... PS9, Line 39: | 1 << CHN_COANT | 1 << CHN_NFC ) space prohibited before that close parenthesis ')'
https://review.coreboot.org/c/coreboot/+/46878/9/src/soc/mediatek/mt8192/src... PS9, Line 60: #define DCXO_FPM_CTRL_MODE MERGE_OR_MODE | ASYNC_MODE /* merge with spm */ Macros with complex values should be enclosed in parentheses
https://review.coreboot.org/c/coreboot/+/46878/9/src/soc/mediatek/mt8192/src... PS9, Line 68: #define SUB_BBLPM_SET ( 1 << CHN_COANT | 1 << CHN_DEEPIDLE ) space prohibited after that open parenthesis '('
https://review.coreboot.org/c/coreboot/+/46878/9/src/soc/mediatek/mt8192/src... PS9, Line 68: #define SUB_BBLPM_SET ( 1 << CHN_COANT | 1 << CHN_DEEPIDLE ) space prohibited before that close parenthesis ')'
https://review.coreboot.org/c/coreboot/+/46878/9/src/soc/mediatek/mt8192/src... PS9, Line 70: | 1 << CHN_MD | 1 << CHN_GPS | 1 <<CHN_BT \ need consistent spacing around '<<' (ctx:WxV)
https://review.coreboot.org/c/coreboot/+/46878/9/src/soc/mediatek/mt8192/src... PS9, Line 82: #define SUB_CTRL_CON(_id, _dcxo_prd, _xo_prd , _sw_bblpm, _sw_fpm, \ space prohibited before that ',' (ctx:WxW)
https://review.coreboot.org/c/coreboot/+/46878/9/src/soc/mediatek/mt8192/src... PS9, Line 93: .sw_rc = _sw_rc, \ please, no space before tabs
https://review.coreboot.org/c/coreboot/+/46878/9/src/soc/mediatek/mt8192/src... PS9, Line 94: .bypass_cmd = _bypass_cmd, \ please, no space before tabs
https://review.coreboot.org/c/coreboot/+/46878/9/src/soc/mediatek/mt8192/src... PS9, Line 103: SUB_CTRL_CON(CHN_SUSPEND, DCXO_STABLE_TIME, XO_STABLE_TIME, SW_BBLPM_LOW, SW_FPM_HIGH, SW_MODE, 0x0 /*bypass*/,DXCO_SETTLE_BLK_EN), line over 96 characters
https://review.coreboot.org/c/coreboot/+/46878/9/src/soc/mediatek/mt8192/src... PS9, Line 103: SUB_CTRL_CON(CHN_SUSPEND, DCXO_STABLE_TIME, XO_STABLE_TIME, SW_BBLPM_LOW, SW_FPM_HIGH, SW_MODE, 0x0 /*bypass*/,DXCO_SETTLE_BLK_EN), space required after that ',' (ctx:CxV)
https://review.coreboot.org/c/coreboot/+/46878/9/src/soc/mediatek/mt8192/src... PS9, Line 104: SUB_CTRL_CON(CHN_RF, DCXO_STABLE_TIME, XO_STABLE_TIME, SW_BBLPM_LOW, SW_FPM_HIGH, SW_MODE, 0x0 /*bypass*/,DXCO_SETTLE_BLK_EN), line over 96 characters
https://review.coreboot.org/c/coreboot/+/46878/9/src/soc/mediatek/mt8192/src... PS9, Line 104: SUB_CTRL_CON(CHN_RF, DCXO_STABLE_TIME, XO_STABLE_TIME, SW_BBLPM_LOW, SW_FPM_HIGH, SW_MODE, 0x0 /*bypass*/,DXCO_SETTLE_BLK_EN), space required after that ',' (ctx:CxV)
https://review.coreboot.org/c/coreboot/+/46878/9/src/soc/mediatek/mt8192/src... PS9, Line 105: SUB_CTRL_CON(CHN_DEEPIDLE, DCXO_STABLE_TIME, XO_STABLE_TIME, SW_BBLPM_LOW, SW_FPM_HIGH, SW_MODE, 0x0 /*bypass*/,DXCO_SETTLE_BLK_EN), line over 96 characters
https://review.coreboot.org/c/coreboot/+/46878/9/src/soc/mediatek/mt8192/src... PS9, Line 105: SUB_CTRL_CON(CHN_DEEPIDLE, DCXO_STABLE_TIME, XO_STABLE_TIME, SW_BBLPM_LOW, SW_FPM_HIGH, SW_MODE, 0x0 /*bypass*/,DXCO_SETTLE_BLK_EN), space required after that ',' (ctx:CxV)
https://review.coreboot.org/c/coreboot/+/46878/9/src/soc/mediatek/mt8192/src... PS9, Line 106: SUB_CTRL_CON(CHN_MD, DCXO_STABLE_TIME, XO_STABLE_TIME, SW_BBLPM_LOW, SW_FPM_HIGH, SW_MODE, 0x0 /*bypass*/,DXCO_SETTLE_BLK_EN), line over 96 characters
https://review.coreboot.org/c/coreboot/+/46878/9/src/soc/mediatek/mt8192/src... PS9, Line 106: SUB_CTRL_CON(CHN_MD, DCXO_STABLE_TIME, XO_STABLE_TIME, SW_BBLPM_LOW, SW_FPM_HIGH, SW_MODE, 0x0 /*bypass*/,DXCO_SETTLE_BLK_EN), space required after that ',' (ctx:CxV)
https://review.coreboot.org/c/coreboot/+/46878/9/src/soc/mediatek/mt8192/src... PS9, Line 107: SUB_CTRL_CON(CHN_GPS, DCXO_STABLE_TIME, XO_STABLE_TIME, SW_BBLPM_LOW, SW_FPM_HIGH, SW_MODE, 0x0 /*bypass*/,DXCO_SETTLE_BLK_EN), line over 96 characters
https://review.coreboot.org/c/coreboot/+/46878/9/src/soc/mediatek/mt8192/src... PS9, Line 107: SUB_CTRL_CON(CHN_GPS, DCXO_STABLE_TIME, XO_STABLE_TIME, SW_BBLPM_LOW, SW_FPM_HIGH, SW_MODE, 0x0 /*bypass*/,DXCO_SETTLE_BLK_EN), space required after that ',' (ctx:CxV)
https://review.coreboot.org/c/coreboot/+/46878/9/src/soc/mediatek/mt8192/src... PS9, Line 108: SUB_CTRL_CON(CHN_BT, DCXO_STABLE_TIME, XO_STABLE_TIME, SW_BBLPM_LOW, SW_FPM_HIGH, SW_MODE, 0x0 /*bypass*/,DXCO_SETTLE_BLK_EN), line over 96 characters
https://review.coreboot.org/c/coreboot/+/46878/9/src/soc/mediatek/mt8192/src... PS9, Line 108: SUB_CTRL_CON(CHN_BT, DCXO_STABLE_TIME, XO_STABLE_TIME, SW_BBLPM_LOW, SW_FPM_HIGH, SW_MODE, 0x0 /*bypass*/,DXCO_SETTLE_BLK_EN), space required after that ',' (ctx:CxV)
https://review.coreboot.org/c/coreboot/+/46878/9/src/soc/mediatek/mt8192/src... PS9, Line 109: SUB_CTRL_CON(CHN_WIFI, DCXO_STABLE_TIME, XO_STABLE_TIME, SW_BBLPM_LOW, SW_FPM_HIGH, SW_MODE, 0x0 /*bypass*/,DXCO_SETTLE_BLK_EN), line over 96 characters
https://review.coreboot.org/c/coreboot/+/46878/9/src/soc/mediatek/mt8192/src... PS9, Line 109: SUB_CTRL_CON(CHN_WIFI, DCXO_STABLE_TIME, XO_STABLE_TIME, SW_BBLPM_LOW, SW_FPM_HIGH, SW_MODE, 0x0 /*bypass*/,DXCO_SETTLE_BLK_EN), space required after that ',' (ctx:CxV)
https://review.coreboot.org/c/coreboot/+/46878/9/src/soc/mediatek/mt8192/src... PS9, Line 110: SUB_CTRL_CON(CHN_MCU, DCXO_STABLE_TIME, XO_STABLE_TIME, SW_BBLPM_LOW, SW_FPM_HIGH, SW_MODE, 0x0 /*bypass*/,DXCO_SETTLE_BLK_EN), line over 96 characters
https://review.coreboot.org/c/coreboot/+/46878/9/src/soc/mediatek/mt8192/src... PS9, Line 110: SUB_CTRL_CON(CHN_MCU, DCXO_STABLE_TIME, XO_STABLE_TIME, SW_BBLPM_LOW, SW_FPM_HIGH, SW_MODE, 0x0 /*bypass*/,DXCO_SETTLE_BLK_EN), space required after that ',' (ctx:CxV)
https://review.coreboot.org/c/coreboot/+/46878/9/src/soc/mediatek/mt8192/src... PS9, Line 111: SUB_CTRL_CON(CHN_COANT, 0x0, 0x0, SW_BBLPM_LOW, SW_FPM_HIGH, SW_MODE, 0x1 /*bypass*/,DXCO_SETTLE_BLK_DIS), line over 96 characters
https://review.coreboot.org/c/coreboot/+/46878/9/src/soc/mediatek/mt8192/src... PS9, Line 111: SUB_CTRL_CON(CHN_COANT, 0x0, 0x0, SW_BBLPM_LOW, SW_FPM_HIGH, SW_MODE, 0x1 /*bypass*/,DXCO_SETTLE_BLK_DIS), space required after that ',' (ctx:CxV)
https://review.coreboot.org/c/coreboot/+/46878/9/src/soc/mediatek/mt8192/src... PS9, Line 112: SUB_CTRL_CON(CHN_NFC, DCXO_STABLE_TIME, XO_STABLE_TIME, SW_BBLPM_LOW, SW_FPM_HIGH, SW_MODE, 0x0 /*bypass*/,DXCO_SETTLE_BLK_EN), line over 96 characters
https://review.coreboot.org/c/coreboot/+/46878/9/src/soc/mediatek/mt8192/src... PS9, Line 112: SUB_CTRL_CON(CHN_NFC, DCXO_STABLE_TIME, XO_STABLE_TIME, SW_BBLPM_LOW, SW_FPM_HIGH, SW_MODE, 0x0 /*bypass*/,DXCO_SETTLE_BLK_EN), space required after that ',' (ctx:CxV)
https://review.coreboot.org/c/coreboot/+/46878/9/src/soc/mediatek/mt8192/src... PS9, Line 113: SUB_CTRL_CON(CHN_UFS, DCXO_STABLE_TIME, XO_STABLE_TIME, SW_BBLPM_LOW, SW_FPM_HIGH, SW_MODE, 0x0 /*bypass*/,DXCO_SETTLE_BLK_EN), line over 96 characters
https://review.coreboot.org/c/coreboot/+/46878/9/src/soc/mediatek/mt8192/src... PS9, Line 113: SUB_CTRL_CON(CHN_UFS, DCXO_STABLE_TIME, XO_STABLE_TIME, SW_BBLPM_LOW, SW_FPM_HIGH, SW_MODE, 0x0 /*bypass*/,DXCO_SETTLE_BLK_EN), space required after that ',' (ctx:CxV)
https://review.coreboot.org/c/coreboot/+/46878/9/src/soc/mediatek/mt8192/src... PS9, Line 114: SUB_CTRL_CON(CHN_SCP, 0x0, 0x0, SW_BBLPM_LOW, SW_FPM_HIGH, SW_MODE, 0x1 /*bypass*/,DXCO_SETTLE_BLK_DIS), line over 96 characters
https://review.coreboot.org/c/coreboot/+/46878/9/src/soc/mediatek/mt8192/src... PS9, Line 114: SUB_CTRL_CON(CHN_SCP, 0x0, 0x0, SW_BBLPM_LOW, SW_FPM_HIGH, SW_MODE, 0x1 /*bypass*/,DXCO_SETTLE_BLK_DIS), space required after that ',' (ctx:CxV)
https://review.coreboot.org/c/coreboot/+/46878/9/src/soc/mediatek/mt8192/src... PS9, Line 115: SUB_CTRL_CON(CHN_RESERVE, 0x0, 0x0, SW_BBLPM_LOW, SW_FPM_HIGH, SW_MODE, 0x1 /*bypass*/,DXCO_SETTLE_BLK_DIS), line over 96 characters
https://review.coreboot.org/c/coreboot/+/46878/9/src/soc/mediatek/mt8192/src... PS9, Line 115: SUB_CTRL_CON(CHN_RESERVE, 0x0, 0x0, SW_BBLPM_LOW, SW_FPM_HIGH, SW_MODE, 0x1 /*bypass*/,DXCO_SETTLE_BLK_DIS), space required after that ',' (ctx:CxV)
https://review.coreboot.org/c/coreboot/+/46878/9/src/soc/mediatek/mt8192/src... PS9, Line 128: static void rc_dump_reg_info(void){ open brace '{' following function definitions go on the next line
https://review.coreboot.org/c/coreboot/+/46878/9/src/soc/mediatek/mt8192/src... PS9, Line 142: for (chn_n = 0; chn_n < MAX_CHN_NUM; chn_n++){ space required before the open brace '{'
https://review.coreboot.org/c/coreboot/+/46878/9/src/soc/mediatek/mt8192/src... PS9, Line 156: if(mode == INIT_MODE){ space required before the open brace '{'
https://review.coreboot.org/c/coreboot/+/46878/9/src/soc/mediatek/mt8192/src... PS9, Line 156: if(mode == INIT_MODE){ space required before the open parenthesis '('
https://review.coreboot.org/c/coreboot/+/46878/9/src/soc/mediatek/mt8192/src... PS9, Line 157: value = ((rc_ctrl[id].dcxo_settle_blk_en & DCXO_SETTLE_BLK_EN_MSK) << DCXO_SETTLE_BLK_EN_SHFT) | line over 96 characters
https://review.coreboot.org/c/coreboot/+/46878/9/src/soc/mediatek/mt8192/src... PS9, Line 158: ((rc_ctrl[id].bypass_cmd & BYPASS_CMD_EN_MSK) << BYPASS_CMD_EN_SHFT) | line over 96 characters
https://review.coreboot.org/c/coreboot/+/46878/9/src/soc/mediatek/mt8192/src... PS9, Line 159: ((rc_ctrl[id].sw_rc & SW_SRCLKEN_RC_MSK) << SW_SRCLKEN_RC_SHFT) | line over 96 characters
https://review.coreboot.org/c/coreboot/+/46878/9/src/soc/mediatek/mt8192/src... PS9, Line 160: ((rc_ctrl[id].sw_fpm & SW_SRCLKEN_FPM_MSK) << SW_SRCLKEN_FPM_SHFT) | line over 96 characters
https://review.coreboot.org/c/coreboot/+/46878/9/src/soc/mediatek/mt8192/src... PS9, Line 161: ((rc_ctrl[id].sw_bblpm & SW_SRCLKEN_BBLPM_MSK) << SW_SRCLKEN_BBLPM_SHFT) | line over 96 characters
https://review.coreboot.org/c/coreboot/+/46878/9/src/soc/mediatek/mt8192/src... PS9, Line 162: ((rc_ctrl[id].xo_soc_link_en & XO_SOC_LINK_EN_MSK) << XO_SOC_LINK_EN_SHFT) | line over 96 characters
https://review.coreboot.org/c/coreboot/+/46878/9/src/soc/mediatek/mt8192/src... PS9, Line 163: ((rc_ctrl[id].req_ack_imd_en & REQ_ACK_LOW_IMD_EN_MSK) << REQ_ACK_LOW_IMD_EN_SHFT) | line over 96 characters
https://review.coreboot.org/c/coreboot/+/46878/9/src/soc/mediatek/mt8192/src... PS9, Line 164: ((rc_ctrl[id].track_en & SRCLKEN_TRACK_M_EN_MSK) << SRCLKEN_TRACK_M_EN_SHFT) | line over 96 characters
https://review.coreboot.org/c/coreboot/+/46878/9/src/soc/mediatek/mt8192/src... PS9, Line 165: ((rc_ctrl[id].cnt_step & CNT_PRD_STEP_MSK) << CNT_PRD_STEP_SHFT) | line over 96 characters
https://review.coreboot.org/c/coreboot/+/46878/9/src/soc/mediatek/mt8192/src... PS9, Line 166: ((rc_ctrl[id].xo_prd & XO_STABLE_PRD_MSK) << XO_STABLE_PRD_SHFT) | line over 96 characters
https://review.coreboot.org/c/coreboot/+/46878/9/src/soc/mediatek/mt8192/src... PS9, Line 167: ((rc_ctrl[id].dcxo_prd & DCXO_STABLE_PRD_MSK) << DCXO_STABLE_PRD_SHFT) ; line over 96 characters
https://review.coreboot.org/c/coreboot/+/46878/9/src/soc/mediatek/mt8192/src... PS9, Line 167: ((rc_ctrl[id].dcxo_prd & DCXO_STABLE_PRD_MSK) << DCXO_STABLE_PRD_SHFT) ; space prohibited before semicolon
https://review.coreboot.org/c/coreboot/+/46878/9/src/soc/mediatek/mt8192/src... PS9, Line 168: }else if (mode == SW_MODE){ space required before the open brace '{'
https://review.coreboot.org/c/coreboot/+/46878/9/src/soc/mediatek/mt8192/src... PS9, Line 168: }else if (mode == SW_MODE){ space required after that close brace '}'
https://review.coreboot.org/c/coreboot/+/46878/9/src/soc/mediatek/mt8192/src... PS9, Line 169: value = read32(&rc_regs->rc_mxx_srclken_cfg[id]) | ( 0x1 << SW_SRCLKEN_RC_SHFT); space prohibited after that open parenthesis '('
https://review.coreboot.org/c/coreboot/+/46878/9/src/soc/mediatek/mt8192/src... PS9, Line 170: }else if (mode == HW_MODE){ space required before the open brace '{'
https://review.coreboot.org/c/coreboot/+/46878/9/src/soc/mediatek/mt8192/src... PS9, Line 170: }else if (mode == HW_MODE){ space required after that close brace '}'
https://review.coreboot.org/c/coreboot/+/46878/9/src/soc/mediatek/mt8192/src... PS9, Line 171: value = read32(&rc_regs->rc_mxx_srclken_cfg[id]) & ~(SW_SRCLKEN_RC_MSK << SW_SRCLKEN_RC_SHFT); line over 96 characters
https://review.coreboot.org/c/coreboot/+/46878/9/src/soc/mediatek/mt8192/src... PS9, Line 172: }else space required after that close brace '}'
https://review.coreboot.org/c/coreboot/+/46878/9/src/soc/mediatek/mt8192/src... PS9, Line 189: if (mode == SW_FPM_HIGH){ space required before the open brace '{'
https://review.coreboot.org/c/coreboot/+/46878/9/src/soc/mediatek/mt8192/src... PS9, Line 189: if (mode == SW_FPM_HIGH){ braces {} are not necessary for any arm of this statement
https://review.coreboot.org/c/coreboot/+/46878/9/src/soc/mediatek/mt8192/src... PS9, Line 190: value = read32(&rc_regs->rc_mxx_srclken_cfg[id]) | ( 0x1 << SW_SRCLKEN_FPM_SHFT); line over 96 characters
https://review.coreboot.org/c/coreboot/+/46878/9/src/soc/mediatek/mt8192/src... PS9, Line 190: value = read32(&rc_regs->rc_mxx_srclken_cfg[id]) | ( 0x1 << SW_SRCLKEN_FPM_SHFT); space prohibited after that open parenthesis '('
https://review.coreboot.org/c/coreboot/+/46878/9/src/soc/mediatek/mt8192/src... PS9, Line 191: }else if (mode == SW_FPM_LOW){ space required before the open brace '{'
https://review.coreboot.org/c/coreboot/+/46878/9/src/soc/mediatek/mt8192/src... PS9, Line 191: }else if (mode == SW_FPM_LOW){ space required after that close brace '}'
https://review.coreboot.org/c/coreboot/+/46878/9/src/soc/mediatek/mt8192/src... PS9, Line 192: value = read32(&rc_regs->rc_mxx_srclken_cfg[id]) & ~(SW_SRCLKEN_FPM_MSK << SW_SRCLKEN_FPM_SHFT); line over 96 characters
https://review.coreboot.org/c/coreboot/+/46878/9/src/soc/mediatek/mt8192/src... PS9, Line 193: }else space required after that close brace '}'
https://review.coreboot.org/c/coreboot/+/46878/9/src/soc/mediatek/mt8192/src... PS9, Line 209: if (mode == SW_BBLPM_HIGH){ space required before the open brace '{'
https://review.coreboot.org/c/coreboot/+/46878/9/src/soc/mediatek/mt8192/src... PS9, Line 209: if (mode == SW_BBLPM_HIGH){ braces {} are not necessary for any arm of this statement
https://review.coreboot.org/c/coreboot/+/46878/9/src/soc/mediatek/mt8192/src... PS9, Line 210: value = read32(&rc_regs->rc_mxx_srclken_cfg[id]) | ( 0x1 << SW_SRCLKEN_BBLPM_SHFT); line over 96 characters
https://review.coreboot.org/c/coreboot/+/46878/9/src/soc/mediatek/mt8192/src... PS9, Line 210: value = read32(&rc_regs->rc_mxx_srclken_cfg[id]) | ( 0x1 << SW_SRCLKEN_BBLPM_SHFT); space prohibited after that open parenthesis '('
https://review.coreboot.org/c/coreboot/+/46878/9/src/soc/mediatek/mt8192/src... PS9, Line 211: }else if (mode == SW_BBLPM_LOW){ space required before the open brace '{'
https://review.coreboot.org/c/coreboot/+/46878/9/src/soc/mediatek/mt8192/src... PS9, Line 211: }else if (mode == SW_BBLPM_LOW){ space required after that close brace '}'
https://review.coreboot.org/c/coreboot/+/46878/9/src/soc/mediatek/mt8192/src... PS9, Line 212: value = read32(&rc_regs->rc_mxx_srclken_cfg[id]) & ~(SW_SRCLKEN_BBLPM_MSK << SW_SRCLKEN_BBLPM_SHFT); line over 96 characters
https://review.coreboot.org/c/coreboot/+/46878/9/src/soc/mediatek/mt8192/src... PS9, Line 213: }else space required after that close brace '}'
https://review.coreboot.org/c/coreboot/+/46878/9/src/soc/mediatek/mt8192/src... PS9, Line 223: static void rc_init_subsys_hw_mode(void){ open brace '{' following function definitions go on the next line
https://review.coreboot.org/c/coreboot/+/46878/9/src/soc/mediatek/mt8192/src... PS9, Line 226: for (chn_n = 0; chn_n < MAX_CHN_NUM; chn_n++){ space required before the open brace '{'
https://review.coreboot.org/c/coreboot/+/46878/9/src/soc/mediatek/mt8192/src... PS9, Line 227: if( INIT_SUBSYS_TO_HW & (1 << chn_n)) space prohibited after that open parenthesis '('
https://review.coreboot.org/c/coreboot/+/46878/9/src/soc/mediatek/mt8192/src... PS9, Line 227: if( INIT_SUBSYS_TO_HW & (1 << chn_n)) space required before the open parenthesis '('
https://review.coreboot.org/c/coreboot/+/46878/9/src/soc/mediatek/mt8192/src... PS9, Line 233: static void rc_init_subsys_lpm(void){ open brace '{' following function definitions go on the next line
https://review.coreboot.org/c/coreboot/+/46878/9/src/soc/mediatek/mt8192/src... PS9, Line 236: for (chn_n = 0; chn_n < MAX_CHN_NUM; chn_n++){ space required before the open brace '{'
https://review.coreboot.org/c/coreboot/+/46878/9/src/soc/mediatek/mt8192/src... PS9, Line 237: if( INIT_SUBSYS_FPM_TO_LPM & (1 << chn_n)) space prohibited after that open parenthesis '('
https://review.coreboot.org/c/coreboot/+/46878/9/src/soc/mediatek/mt8192/src... PS9, Line 237: if( INIT_SUBSYS_FPM_TO_LPM & (1 << chn_n)) space required before the open parenthesis '('
https://review.coreboot.org/c/coreboot/+/46878/9/src/soc/mediatek/mt8192/src... PS9, Line 240: for (chn_n = 0; chn_n < MAX_CHN_NUM; chn_n++){ space required before the open brace '{'
https://review.coreboot.org/c/coreboot/+/46878/9/src/soc/mediatek/mt8192/src... PS9, Line 241: if( INIT_SUBSYS_FPM_TO_BBLPM & (1 << chn_n)) space prohibited after that open parenthesis '('
https://review.coreboot.org/c/coreboot/+/46878/9/src/soc/mediatek/mt8192/src... PS9, Line 241: if( INIT_SUBSYS_FPM_TO_BBLPM & (1 << chn_n)) space required before the open parenthesis '('
https://review.coreboot.org/c/coreboot/+/46878/9/src/soc/mediatek/mt8192/src... PS9, Line 314: (1 << SW_RESET_SHFT) |(1 << CG_32K_EN_SHFT) need consistent spacing around '|' (ctx:WxV)
https://review.coreboot.org/c/coreboot/+/46878/9/src/soc/mediatek/mt8192/src... PS9, Line 405: if(chn_n > 0) space required before the open parenthesis '('
https://review.coreboot.org/c/coreboot/+/46878/9/src/soc/mediatek/mt8192/src... PS9, Line 411: while((read32(&rc_sta_regs->rc_mxx_req_sta_0[chn_n + shift_chn_n]) & 0xa) != chk_sta) { line over 96 characters
https://review.coreboot.org/c/coreboot/+/46878/9/src/soc/mediatek/mt8192/src... PS9, Line 411: while((read32(&rc_sta_regs->rc_mxx_req_sta_0[chn_n + shift_chn_n]) & 0xa) != chk_sta) { space required before the open parenthesis '('
https://review.coreboot.org/c/coreboot/+/46878/9/src/soc/mediatek/mt8192/src... PS9, Line 414: if(i > 200) { space required before the open parenthesis '('
https://review.coreboot.org/c/coreboot/+/46878/9/src/soc/mediatek/mt8192/src... PS9, Line 418: read32(&rc_sta_regs->rc_mxx_req_sta_0[chn_n + shift_chn_n]), line over 96 characters