[coreboot-gerrit] Change in coreboot[master]: soc/amd/picasso,mb/google/zork: Remove invalid UPWS variable

[Raul Rangel (Code Review)]

Raul Rangel has uploaded this change for review. ( https://review.coreboot.org/c/coreboot/+/43424 )

Change subject: soc/amd/picasso,mb/google/zork: Remove invalid UPWS variable
......................................................................

soc/amd/picasso,mb/google/zork: Remove invalid UPWS variable

PMx0EE is not defined in the Picasso PPR.

BUG=b:153001807, b:154756391
TEST=None

Signed-off-by: Raul E Rangel 
Change-Id: I98caf0cd2d0bdcf19de2b945dcf74f5cf7354769
---
M src/mainboard/google/zork/variants/baseboard/include/baseboard/acpi/sleep.asl
M src/soc/amd/picasso/acpi/pcie.asl
2 files changed, 0 insertions(+), 3 deletions(-)

git pull ssh://review.coreboot.org:29418/coreboot refs/changes/24/43424/1

diff --git a/src/mainboard/google/zork/variants/baseboard/include/baseboard/acpi/sleep.asl b/src/mainboard/google/zork/variants/baseboard/include/baseboard/acpi/sleep.asl
index a5f2490..3061596 100644
--- a/src/mainboard/google/zork/variants/baseboard/include/baseboard/acpi/sleep.asl
+++ b/src/mainboard/google/zork/variants/baseboard/include/baseboard/acpi/sleep.asl
@@ -23,7 +23,6 @@
    /* DBGO("\n") */

Store(0, PEWD)
-	Store(7, UPWS)
 } /* End Method(_PTS) */

/*
diff --git a/src/soc/amd/picasso/acpi/pcie.asl b/src/soc/amd/picasso/acpi/pcie.asl
index 954c5365..c11e63d 100644
--- a/src/soc/amd/picasso/acpi/pcie.asl
+++ b/src/soc/amd/picasso/acpi/pcie.asl
@@ -122,8 +122,6 @@
    IndexField (PIOI, PIOD, ByteAcc, NoLock, Preserve) {
    	Offset(0x60),		/* AcpiPm1EvgBlk */
    	P1EB, 16,
-		Offset(0xee),
-		UPWS, 3,
    }
    OperationRegion (P1E0, SystemIO, P1EB, 0x04)
    	Field (P1E0, ByteAcc, Nolock, Preserve) {