Patrick Georgi (pgeorgi@google.com) just uploaded a new patch set to gerrit, which you can find at http://review.coreboot.org/9522
-gerrit
commit 840a65bc6d12ee00f521a59d7959f697bec1a90e Author: Jimmy Zhang jimmzhang@nvidia.com Date: Thu Nov 13 18:17:54 2014 -0800
tegra132: Set dc to resize the difference between framebuffer and panel
Scale framebuffer resolution to panel resolution.
BRANCH=none BUG=chrome-os-partner:31936 TEST=build and test on ryu
Change-Id: Idb19f5871605e878ea380cc8f701a377350681fb Signed-off-by: Patrick Georgi pgeorgi@chromium.org Original-Commit-Id: d2f08a704fe3a7be1e0448e4ed864c69b50d6838 Original-Change-Id: I5ac01539da3712cd6afdb8d08513da399ace0f92 Original-Signed-off-by: Jimmy Zhang jimmzhang@nvidia.com Original-Reviewed-on: https://chromium-review.googlesource.com/229494 Original-Reviewed-by: Aaron Durbin adurbin@chromium.org Original-Commit-Queue: Aaron Durbin adurbin@chromium.org --- src/soc/nvidia/tegra/dc.h | 2 ++ src/soc/nvidia/tegra132/display.c | 23 ++++++++++++++--------- 2 files changed, 16 insertions(+), 9 deletions(-)
diff --git a/src/soc/nvidia/tegra/dc.h b/src/soc/nvidia/tegra/dc.h index 0d2d761..71c3881 100644 --- a/src/soc/nvidia/tegra/dc.h +++ b/src/soc/nvidia/tegra/dc.h @@ -488,6 +488,8 @@ enum { };
/* DC_WIN_DDA_INCREMENT 0x709 */ +#define DDA_INC(prescaled_size, post_scaled_size) \ + (((prescaled_size) - 1) * 0x1000 / ((post_scaled_size) - 1)) #define H_DDA_INC(x) (((x) & 0xffff) << 0) #define V_DDA_INC(x) (((x) & 0xffff) << 16)
diff --git a/src/soc/nvidia/tegra132/display.c b/src/soc/nvidia/tegra132/display.c index 1708b5a..4fc312e 100644 --- a/src/soc/nvidia/tegra132/display.c +++ b/src/soc/nvidia/tegra132/display.c @@ -82,7 +82,7 @@ static void print_mode(const struct soc_nvidia_tegra132_config *config) if (config) { int refresh = tegra_calc_refresh(config); printk(BIOS_ERR, - "MODE:%dx%d@%d.%03uHz pclk=%d\n", + "Panel Mode: %dx%d@%d.%03uHz pclk=%d\n", config->xres, config->yres, refresh / 1000, refresh % 1000, config->pixel_clock); @@ -164,17 +164,21 @@ static void update_window(const struct soc_nvidia_tegra132_config *config) WRITEL(WINDOW_A_SELECT, &disp_ctrl->cmd.disp_win_header);
WRITEL(((config->yres << 16) | config->xres), &disp_ctrl->win.size); - WRITEL(((config->yres << 16) | - (config->xres * config->framebuffer_bits_per_pixel / 8)), + + WRITEL(((config->display_yres << 16) | + (config->display_xres * + config->framebuffer_bits_per_pixel / 8)), &disp_ctrl->win.prescaled_size);
- val = ALIGN_UP((config->xres * config->framebuffer_bits_per_pixel / 8), - 64); + val = ALIGN_UP((config->display_xres * + config->framebuffer_bits_per_pixel / 8), 64); WRITEL(val, &disp_ctrl->win.line_stride);
WRITEL(config->color_depth, &disp_ctrl->win.color_depth); WRITEL(COLOR_BLACK, &disp_ctrl->disp.blend_background_color); - WRITEL((V_DDA_INC(0x1000) | H_DDA_INC(0x1000)), + + WRITEL(((DDA_INC(config->display_yres, config->yres) << 16) | + DDA_INC(config->display_xres, config->xres)), &disp_ctrl->win.dda_increment);
WRITEL(DISP_CTRL_MODE_C_DISPLAY, &disp_ctrl->cmd.disp_cmd); @@ -247,7 +251,8 @@ void display_startup(device_t dev) }
if (framebuffer_size_mb == 0){ - framebuffer_size_mb = ALIGN_UP(config->xres * config->yres * + framebuffer_size_mb = ALIGN_UP(config->display_xres * + config->display_yres * (config->framebuffer_bits_per_pixel / 8), MiB)/MiB; }
@@ -299,11 +304,11 @@ void display_startup(device_t dev) */ struct edid edid; /* Align bytes_per_line to 64 bytes as required by dc */ - edid.bytes_per_line = ALIGN_UP((config->xres * + edid.bytes_per_line = ALIGN_UP((config->display_xres * config->framebuffer_bits_per_pixel / 8), 64); edid.x_resolution = edid.bytes_per_line / (config->framebuffer_bits_per_pixel / 8); - edid.y_resolution = config->yres; + edid.y_resolution = config->display_yres; edid.framebuffer_bits_per_pixel = config->framebuffer_bits_per_pixel;
printk(BIOS_INFO, "%s: bytes_per_line: %d, bits_per_pixel: %d\n "