Attention is currently required from: Arthur Heymans, Raul Rangel, Tristan Corrick, Alexander Couzens, Patrick Rudolph. Angel Pons has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/58604 )
Change subject: cpu/intel/haswell: Remove the fake lapic ......................................................................
Patch Set 1:
(1 comment)
File src/cpu/intel/haswell/acpi.c:
https://review.coreboot.org/c/coreboot/+/58604/comment/36f024ad_bc362641 PS1, Line 175: s0ix_enable
Why is this config on the CPU? It sounds like using config_of_soc() would be a better place for this […]
On platforms with separate CPU/northbridge/southbridge devicetree chips, `config_of_soc()` returns the config of the northbridge chip, not the CPU chip. The `s0ix_enable` setting is only used in CPU code, so it makes sense to have it in the CPU chip's config.
Haswell and Broadwell are very similar, but Broadwell coreboot support was added without reusing any of the existing Haswell code. I've been trying to unify the code, but I'm not done yet. `cpu/intel/haswell` is used by both Haswell (`northbridge/intel/haswell` and `southbridge/intel/lynxpoint`) and Broadwell (`soc/intel/broadwell` and `soc/intel/broadwell/pch`). The current structure of Broadwell code is because I haven't finished unifying everything yet, but the plan is to get it out of `soc/intel`. Currently, `soc/intel/broadwell` provides the northbridge chip, and `soc/intel/broadwell/pch` provides the southbridge chip.
The Haswell CPU code is used with both `northbridge/intel/haswell` and `soc/intel/broadwell`. If `s0ix_enable` was part of the northbridge config, it would need to be in both the `northbridge/intel/haswell` and `soc/intel/broadwell` chips' config, which would unnecessarily complicate getting the setting from shared CPU code: depending on the board, the pointer returned by `config_of_soc()` points to a `struct northbridge_intel_haswell_config` or a `struct soc_intel_broadwell_config`.
TL;DR: `s0ix_enable` is a CPU setting, and this is not a SoC: there's multiple devicetree chips, and `config_of_soc()` returns the config of the northbridge chip, which is separate from the CPU chip. And this CPU code is used with two different northbridge chips, so the type of the data pointed by pointers returned by `config_of_soc()` is config-dependent. It's not worth the hassle.