Patrick Rudolph has uploaded this change for review. ( https://review.coreboot.org/c/coreboot/+/58298 )
Change subject: [WIP]soc/intel/cnl: Skip sending MBP hob to save boot time ......................................................................
[WIP]soc/intel/cnl: Skip sending MBP hob to save boot time
MBP Hob is being generated by FSP after getting data from ME. coreboot does not consume this Hob and FSP provides an option for bootloader to skip generation of this Hob.
Needs test.
Change-Id: I199259cf1141b9eaf3724895adc0955f2003e4db Signed-off-by: Patrick Rudolph patrick.rudolph@9elements.com --- M src/soc/intel/cannonlake/romstage/fsp_params.c 1 file changed, 3 insertions(+), 0 deletions(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/98/58298/1
diff --git a/src/soc/intel/cannonlake/romstage/fsp_params.c b/src/soc/intel/cannonlake/romstage/fsp_params.c index 2bb3024..c57d21d 100644 --- a/src/soc/intel/cannonlake/romstage/fsp_params.c +++ b/src/soc/intel/cannonlake/romstage/fsp_params.c @@ -151,6 +151,9 @@ /* Set HECI1 PCI BAR address */ m_cfg->Heci1BarAddress = HECI1_BASE_ADDRESS;
+ /* Skip sending MBP HOB from FSP */ + tconfig->SkipMbpHob = 1; + mainboard_memory_init_params(mupd); }