Nico Huber has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/36216 )
Change subject: soc/intel: common,skl,cnl,icl: drop reserved mmio memory size calculation ......................................................................
Patch Set 6:
(1 comment)
https://review.coreboot.org/c/coreboot/+/36216/5/src/soc/intel/common/block/... File src/soc/intel/common/block/systemagent/systemagent.c:
https://review.coreboot.org/c/coreboot/+/36216/5/src/soc/intel/common/block/... PS5, Line 187: - reserved_mmio_size;
Yes, but it's not necessarily 0 by definition. It's 0 understand platform configurations. […]
I just went through all the affected memmap implementations again, still don't see it.
Small core has no DPR and no reserved range, and `cbmem_top = TSEG base`. Big cores all define `cbmem_top = TSEG base - DPR - reserved range`.
So what we effectively have here is an API that allows us to decide, at the SoC level, what portion of the range cbmem_top..DPR is MMIO and what portion is RAM. But we never make use of that flexibility. We always mark everything as RAM.
Which leaves us with a design choice, but nothing to look at in logs. Do we want to keep this API? It wouldn't be hard: big core would simply have to define `soc_reserved_mmio_size = TSEG base - DPR - cbmem_top` (with the `cbmem_top` provided by FSP). But I don't see why we'd ever need it.