Nico Huber has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/38694 )
Change subject: soc/amd/picasso: Move BERT region to cbmem ......................................................................
Patch Set 9:
(3 comments)
Ah, sorry, Gerrit just told me, I'm too late.
https://review.coreboot.org/c/coreboot/+/38694/8/src/soc/amd/picasso/Kconfig File src/soc/amd/picasso/Kconfig:
https://review.coreboot.org/c/coreboot/+/38694/8/src/soc/amd/picasso/Kconfig... PS8, Line 199: 8MB Please update.
https://review.coreboot.org/c/coreboot/+/38694/8/src/soc/amd/picasso/memmap.... File src/soc/amd/picasso/memmap.c:
https://review.coreboot.org/c/coreboot/+/38694/8/src/soc/amd/picasso/memmap.... PS8, Line 35: start = NULL; Looks like a bug, are there more copies of this?
https://review.coreboot.org/c/coreboot/+/38694/8/src/soc/amd/picasso/memmap.... PS8, Line 33: return (uintptr_t)cbmem_top(); Where is TSEG actually configured in the hardware? Is the same ALIGN_DOWN() reflected there?