Patrick Georgi has submitted this change and it was merged. ( https://review.coreboot.org/c/coreboot/+/31553 )
Change subject: mb/google/hatch: update SD card detect GPIO ......................................................................
mb/google/hatch: update SD card detect GPIO
SD_CD# in Cannonlake PCH is also wired to an internal virtual GPIO, expose that GPIO for kernel to configure card detect IRQ.
BUG=b:123350329
Change-Id: I566cc2eb11dc257366897a1efba905b8ddcf493d Signed-off-by: Rizwan Qureshi rizwan.qureshi@intel.com Reviewed-on: https://review.coreboot.org/c/31553 Tested-by: build bot (Jenkins) no-reply@coreboot.org Reviewed-by: Furquan Shaikh furquan@google.com --- M src/mainboard/google/hatch/variants/baseboard/devicetree.cb M src/mainboard/google/hatch/variants/baseboard/gpio.c 2 files changed, 3 insertions(+), 1 deletion(-)
Approvals: build bot (Jenkins): Verified Furquan Shaikh: Looks good to me, approved
diff --git a/src/mainboard/google/hatch/variants/baseboard/devicetree.cb b/src/mainboard/google/hatch/variants/baseboard/devicetree.cb index f913e77..e2c3392 100644 --- a/src/mainboard/google/hatch/variants/baseboard/devicetree.cb +++ b/src/mainboard/google/hatch/variants/baseboard/devicetree.cb @@ -89,7 +89,7 @@ register "PcieClkSrcClkReq[1]" = "1"
# GPIO for SD card detect - register "sdcard_cd_gpio" = "GPP_G5" + register "sdcard_cd_gpio" = "vSD3_CD_B"
# PCIe port 14 for M.2 E-key WLAN register "PcieRpEnable[13]" = "1" diff --git a/src/mainboard/google/hatch/variants/baseboard/gpio.c b/src/mainboard/google/hatch/variants/baseboard/gpio.c index 769d2ab..e1189b9 100644 --- a/src/mainboard/google/hatch/variants/baseboard/gpio.c +++ b/src/mainboard/google/hatch/variants/baseboard/gpio.c @@ -178,6 +178,8 @@ PAD_NC(GPP_H10, NONE), /* PCH_I2C_TRACKPAD_SCL */ PAD_NC(GPP_H11, NONE), + /* SD card detect VGPIO */ + PAD_CFG_GPI_GPIO_DRIVER(vSD3_CD_B, NONE, DEEP),
/* GPD2: LAN_WAKE# ==> EC_PCH_WAKE_OD */ PAD_CFG_NF(GPD2, NONE, DEEP, NF1),