Subrata Banik has submitted this change. ( https://review.coreboot.org/c/coreboot/+/85528?usp=email )
Change subject: soc/intel/pantherlake: Fix UFS ACPI _ADR calculation ......................................................................
soc/intel/pantherlake: Fix UFS ACPI _ADR calculation
This patch corrects the calculation of the _ADR value for the Intel UFS controller in the `soc/ufs.h` header file.
The previous calculation incorrectly included a hardcoded value (0x0007) in the lower bits of the _ADR. This is not in line with the Panther Lake EDS specification (doc: 815002)
BUG=b:382243957 TEST=Able to build and boot google/fatcat.
iasl -d /sys/firmware/acpi/tables/DSDT
Device (UFS) { Name (_ADR, 0x00170000) // _ADR: Address Name (_DDN, "UFS Controller") // _DDN: DOS Device Name Name (_DSD, Package (0x02) // _DSD: Device-Specific Data
Change-Id: I889403e4d33efb5818fec06d773b5aec0a74d0b3 Signed-off-by: Subrata Banik subratabanik@google.com Reviewed-on: https://review.coreboot.org/c/coreboot/+/85528 Reviewed-by: Divagar Mohandass divagar.mohandass@intel.com Tested-by: build bot (Jenkins) no-reply@coreboot.org Reviewed-by: Dinesh Gehlot digehlot@google.com Reviewed-by: Kapil Porwal kapilporwal@google.com Reviewed-by: Pranava Y N pranavayn@google.com --- M src/soc/intel/pantherlake/include/soc/ufs.h 1 file changed, 1 insertion(+), 1 deletion(-)
Approvals: Pranava Y N: Looks good to me, approved Kapil Porwal: Looks good to me, approved build bot (Jenkins): Verified Dinesh Gehlot: Looks good to me, approved Divagar Mohandass: Looks good to me, but someone else must approve
diff --git a/src/soc/intel/pantherlake/include/soc/ufs.h b/src/soc/intel/pantherlake/include/soc/ufs.h index ffd9b1f..e5a87e6 100644 --- a/src/soc/intel/pantherlake/include/soc/ufs.h +++ b/src/soc/intel/pantherlake/include/soc/ufs.h @@ -11,7 +11,7 @@ #include <soc/pci_devs.h>
/* Calculate _ADR for Intel UFS Controller */ -#define UFS_ACPI_DEVICE (PCI_DEV_SLOT_UFS << 16 | 0x0007) +#define UFS_ACPI_DEVICE (PCI_DEV_SLOT_UFS << 16)
#define R_SCS_CFG_PCS 0x84 #define R_SCS_CFG_PG_CONFIG 0xA2