Kane Chen has uploaded this change for review. ( https://review.coreboot.org/c/coreboot/+/31368
Change subject: [WIP]mb/google: Remove TOL_1V8 setting for pads in GPP_F ......................................................................
[WIP]mb/google: Remove TOL_1V8 setting for pads in GPP_F
Change-Id: I419ef3e89104ad3611e96bbe23a582504b45be0c Signed-off-by: Kane Chen kane.chen@intel.com --- M src/mainboard/google/fizz/variants/baseboard/gpio.c M src/mainboard/google/poppy/variants/baseboard/gpio.c M src/mainboard/google/poppy/variants/nami/gpio.c M src/mainboard/google/poppy/variants/nautilus/gpio.c M src/mainboard/google/poppy/variants/soraka/gpio.c 5 files changed, 26 insertions(+), 26 deletions(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/68/31368/1
diff --git a/src/mainboard/google/fizz/variants/baseboard/gpio.c b/src/mainboard/google/fizz/variants/baseboard/gpio.c index 4cd3865..7ea5c6f 100644 --- a/src/mainboard/google/fizz/variants/baseboard/gpio.c +++ b/src/mainboard/google/fizz/variants/baseboard/gpio.c @@ -193,9 +193,9 @@ /* I2C3_SCL */ PAD_CFG_NC(GPP_F7), /* I2C4_SDA */ PAD_CFG_NC(GPP_F8), /* I2C4_SCL */ PAD_CFG_NC(GPP_F9), -/* I2C5_SDA */ PAD_CFG_NF_1V8(GPP_F10, NONE, DEEP, +/* I2C5_SDA */ PAD_CFG_NF(GPP_F10, NONE, DEEP, NF1), /* PCH_I2C2_AUDIO_1V8_SDA */ -/* I2C5_SCL */ PAD_CFG_NF_1V8(GPP_F11, NONE, DEEP, +/* I2C5_SCL */ PAD_CFG_NF(GPP_F11, NONE, DEEP, NF1), /* PCH_I2C2_AUDIO_1V8_SCL */ /* EMMC_CMD */ PAD_CFG_NC(GPP_F12), /* EMMC_DATA0 */ PAD_CFG_NC(GPP_F13), diff --git a/src/mainboard/google/poppy/variants/baseboard/gpio.c b/src/mainboard/google/poppy/variants/baseboard/gpio.c index c731b52..c007b7f 100644 --- a/src/mainboard/google/poppy/variants/baseboard/gpio.c +++ b/src/mainboard/google/poppy/variants/baseboard/gpio.c @@ -268,21 +268,21 @@ /* F3 : I2S2_RXD ==> NC */ PAD_CFG_NC(GPP_F3), /* F4 : I2C2_SDA ==> PCH_I2C2_CAM_PMIC_1V8_SDA */ - PAD_CFG_NF_1V8(GPP_F4, NONE, DEEP, NF1), + PAD_CFG_NF(GPP_F4, NONE, DEEP, NF1), /* F5 : I2C2_SCL ==> PCH_I2C2_CAM_PMIC_1V8_SCL */ - PAD_CFG_NF_1V8(GPP_F5, NONE, DEEP, NF1), + PAD_CFG_NF(GPP_F5, NONE, DEEP, NF1), /* F6 : I2C3_SDA ==> PCH_I2C3_PEN_1V8_SDA */ - PAD_CFG_NF_1V8(GPP_F6, NONE, DEEP, NF1), + PAD_CFG_NF(GPP_F6, NONE, DEEP, NF1), /* F7 : I2C3_SCL ==> PCH_I2C3_PEN_1V8_SCL */ - PAD_CFG_NF_1V8(GPP_F7, NONE, DEEP, NF1), + PAD_CFG_NF(GPP_F7, NONE, DEEP, NF1), /* F8 : I2C4_SDA ==> PCH_I2C4_UFCAM_1V8_SDA */ - PAD_CFG_NF_1V8(GPP_F8, NONE, DEEP, NF1), + PAD_CFG_NF(GPP_F8, NONE, DEEP, NF1), /* F9 : I2C4_SCL ==> PCH_I2C4_UFCAM_1V8_SCL */ - PAD_CFG_NF_1V8(GPP_F9, NONE, DEEP, NF1), + PAD_CFG_NF(GPP_F9, NONE, DEEP, NF1), /* F10 : I2C5_SDA ==> PCH_I2C5_AUDIO_1V8_SDA */ - PAD_CFG_NF_1V8(GPP_F10, NONE, DEEP, NF1), + PAD_CFG_NF(GPP_F10, NONE, DEEP, NF1), /* F11 : I2C5_SCL ==> PCH_I2C5_AUDIO_1V8_SCL */ - PAD_CFG_NF_1V8(GPP_F11, NONE, DEEP, NF1), + PAD_CFG_NF(GPP_F11, NONE, DEEP, NF1), /* F12 : EMMC_CMD */ PAD_CFG_NF(GPP_F12, NONE, DEEP, NF1), /* F13 : EMMC_DATA0 */ diff --git a/src/mainboard/google/poppy/variants/nami/gpio.c b/src/mainboard/google/poppy/variants/nami/gpio.c index cd7e0ca..6d45c73 100644 --- a/src/mainboard/google/poppy/variants/nami/gpio.c +++ b/src/mainboard/google/poppy/variants/nami/gpio.c @@ -265,13 +265,13 @@ /* F3 : I2S2_RXD ==> NC */ PAD_CFG_NC(GPP_F3), /* F4 : I2C2_SDA ==> I2C_2_SDA */ - PAD_CFG_NF_1V8(GPP_F4, NONE, DEEP, NF1), + PAD_CFG_NF(GPP_F4, NONE, DEEP, NF1), /* F5 : I2C2_SCL ==> I2C_2_SCL */ - PAD_CFG_NF_1V8(GPP_F5, NONE, DEEP, NF1), + PAD_CFG_NF(GPP_F5, NONE, DEEP, NF1), /* F6 : I2C3_SDA ==> I2C_3_SDA */ - PAD_CFG_NF_1V8(GPP_F6, NONE, DEEP, NF1), + PAD_CFG_NF(GPP_F6, NONE, DEEP, NF1), /* F7 : I2C3_SCL ==> I2C_3_SCL */ - PAD_CFG_NF_1V8(GPP_F7, NONE, DEEP, NF1), + PAD_CFG_NF(GPP_F7, NONE, DEEP, NF1), /* F8 : I2C4_SDA ==> I2C_4_SDA (unstuffed) */ PAD_CFG_NC(GPP_F8), /* F9 : I2C4_SCL ==> I2C_4_SCL (unstuffed) */ diff --git a/src/mainboard/google/poppy/variants/nautilus/gpio.c b/src/mainboard/google/poppy/variants/nautilus/gpio.c index 4f80e2f..9fa8748 100644 --- a/src/mainboard/google/poppy/variants/nautilus/gpio.c +++ b/src/mainboard/google/poppy/variants/nautilus/gpio.c @@ -259,13 +259,13 @@ /* F3 : I2S2_RXD ==> NC */ PAD_CFG_NC(GPP_F3), /* F4 : I2C2_SDA ==> CHP1_I2C2_CAM_PMIC_SDA */ - PAD_CFG_NF_1V8(GPP_F4, NONE, DEEP, NF1), + PAD_CFG_NF(GPP_F4, NONE, DEEP, NF1), /* F5 : I2C2_SCL ==> CHP1_I2C2_CAM_PMIC_SCL */ - PAD_CFG_NF_1V8(GPP_F5, NONE, DEEP, NF1), + PAD_CFG_NF(GPP_F5, NONE, DEEP, NF1), /* F6 : I2C3_SDA ==> CHP1_I2C3_DIG_SDA */ - PAD_CFG_NF_1V8(GPP_F6, 5K_PU, DEEP, NF1), + PAD_CFG_NF(GPP_F6, 5K_PU, DEEP, NF1), /* F7 : I2C3_SCL ==> CHP1_I2C3_DIG_SCL */ - PAD_CFG_NF_1V8(GPP_F7, 5K_PU, DEEP, NF1), + PAD_CFG_NF(GPP_F7, 5K_PU, DEEP, NF1), /* F8 : I2C4_SDA ==> CHP1_I2C4_TP_SDA */ PAD_CFG_NF_1V8(GPP_F8, NONE, DEEP, NF1), /* F9 : I2C4_SCL ==> CHP1_I2C4_TP_SCL */ diff --git a/src/mainboard/google/poppy/variants/soraka/gpio.c b/src/mainboard/google/poppy/variants/soraka/gpio.c index 0e24bb7..25240f0 100644 --- a/src/mainboard/google/poppy/variants/soraka/gpio.c +++ b/src/mainboard/google/poppy/variants/soraka/gpio.c @@ -268,21 +268,21 @@ /* F3 : I2S2_RXD ==> NC */ PAD_CFG_NC(GPP_F3), /* F4 : I2C2_SDA ==> PCH_I2C2_CAM_PMIC_1V8_SDA */ - PAD_CFG_NF_1V8(GPP_F4, NONE, DEEP, NF1), + PAD_CFG_NF(GPP_F4, NONE, DEEP, NF1), /* F5 : I2C2_SCL ==> PCH_I2C2_CAM_PMIC_1V8_SCL */ - PAD_CFG_NF_1V8(GPP_F5, NONE, DEEP, NF1), + PAD_CFG_NF(GPP_F5, NONE, DEEP, NF1), /* F6 : I2C3_SDA ==> PCH_I2C3_PEN_1V8_SDA */ - PAD_CFG_NF_1V8(GPP_F6, NONE, DEEP, NF1), + PAD_CFG_NF(GPP_F6, NONE, DEEP, NF1), /* F7 : I2C3_SCL ==> PCH_I2C3_PEN_1V8_SCL */ - PAD_CFG_NF_1V8(GPP_F7, NONE, DEEP, NF1), + PAD_CFG_NF(GPP_F7, NONE, DEEP, NF1), /* F8 : I2C4_SDA ==> PCH_I2C4_UFCAM_1V8_SDA */ - PAD_CFG_NF_1V8(GPP_F8, NONE, DEEP, NF1), + PAD_CFG_NF(GPP_F8, NONE, DEEP, NF1), /* F9 : I2C4_SCL ==> PCH_I2C4_UFCAM_1V8_SCL */ - PAD_CFG_NF_1V8(GPP_F9, NONE, DEEP, NF1), + PAD_CFG_NF(GPP_F9, NONE, DEEP, NF1), /* F10 : I2C5_SDA ==> PCH_I2C5_AUDIO_1V8_SDA */ - PAD_CFG_NF_1V8(GPP_F10, NONE, DEEP, NF1), + PAD_CFG_NF(GPP_F10, NONE, DEEP, NF1), /* F11 : I2C5_SCL ==> PCH_I2C5_AUDIO_1V8_SCL */ - PAD_CFG_NF_1V8(GPP_F11, NONE, DEEP, NF1), + PAD_CFG_NF(GPP_F11, NONE, DEEP, NF1), /* F12 : EMMC_CMD */ PAD_CFG_NF(GPP_F12, NONE, DEEP, NF1), /* F13 : EMMC_DATA0 */