Paul Menzel has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/46899 )
Change subject: mb/intel/adlp: Add support for LPDDR5
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Patch Set 12:
(3 comments)
https://review.coreboot.org/c/coreboot/+/46899/12/src/mainboard/intel/adlrvp...
File src/mainboard/intel/adlrvp/memory.c:
https://review.coreboot.org/c/coreboot/+/46899/12/src/mainboard/intel/adlrvp...
PS12, Line 62: 15, 14, 12, 13, 8, 9, 10, 11 }, /* Byte 1 */
Should bytes 0 and 1 be put on one line?
https://review.coreboot.org/c/coreboot/+/46899/12/src/mainboard/intel/adlrvp...
PS12, Line 81: { 0, 1 }, { 0, 1 }, { 0, 1 }, { 0, 1 },
: { 0, 1 }, { 0, 1 }, { 0, 1 }, { 0, 1 }
These should be indented, and even put on onel ine.
https://review.coreboot.org/c/coreboot/+/46899/12/src/mainboard/intel/adlrvp...
PS12, Line 89: 0xFF
Lowercase?
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