[coreboot-gerrit] [S] Change in coreboot[main]: device/pci_ids: Add new Intel PTL device IDs for UARTx

[Subrata Banik (Code Review)]

Subrata Banik has submitted this change. ( https://review.coreboot.org/c/coreboot/+/83510?usp=email )

Change subject: device/pci_ids: Add new Intel PTL device IDs for UARTx
......................................................................

device/pci_ids: Add new Intel PTL device IDs for UARTx

This patch adds new UARTx PCI device IDs for Intel PTL-U
and PTL-H.

Additionally, updates the UART driver's `pci_device_ids` list to
include these new IDs.

Source: Intel PTL-EDS vol 1. Document Number 815002, Rev 0.51 Chapter 2

BUG=b:347669091
TEST=Able to build google/fatcat.

Change-Id: I384a753f08ae5a752cef6009d07104e8ff4b4a6e
Signed-off-by: Subrata Banik 
Reviewed-on: https://review.coreboot.org/c/coreboot/+/83510
Tested-by: build bot (Jenkins) 
Reviewed-by: Angel Pons 
---
M src/include/device/pci_ids.h
M src/soc/intel/common/block/uart/uart.c
2 files changed, 18 insertions(+), 9 deletions(-)

Approvals:
  build bot (Jenkins): Verified
  Angel Pons: Looks good to me, approved

diff --git a/src/include/device/pci_ids.h b/src/include/device/pci_ids.h
index 967f657..69bfc92 100644
--- a/src/include/device/pci_ids.h
+++ b/src/include/device/pci_ids.h
@@ -3996,9 +3996,12 @@
 #define PCI_DID_INTEL_LNL_UART1			0xa826
 #define PCI_DID_INTEL_LNL_UART2			0xa852

-#define PCI_DID_INTEL_PTL_UART0			0xe425
-#define PCI_DID_INTEL_PTL_UART1			0xe426
-#define PCI_DID_INTEL_PTL_UART2			0xe452
+#define PCI_DID_INTEL_PTL_H_UART0		0xe425
+#define PCI_DID_INTEL_PTL_H_UART1		0xe426
+#define PCI_DID_INTEL_PTL_H_UART2		0xe452
+#define PCI_DID_INTEL_PTL_U_H_UART0		0xe325
+#define PCI_DID_INTEL_PTL_U_H_UART1		0xe326
+#define PCI_DID_INTEL_PTL_U_H_UART2		0xe352

/* Intel SPI device Ids */
 #define PCI_DID_INTEL_LPT_LP_GSPI0		0x9c65
diff --git a/src/soc/intel/common/block/uart/uart.c b/src/soc/intel/common/block/uart/uart.c
index e454f7e..ef83f53 100644
--- a/src/soc/intel/common/block/uart/uart.c
+++ b/src/soc/intel/common/block/uart/uart.c
@@ -308,7 +308,8 @@
 static const char *uart_acpi_name(const struct device *dev)
 {
    switch (dev->device) {
-	case PCI_DID_INTEL_PTL_UART0:
+	case PCI_DID_INTEL_PTL_H_UART0:
+	case PCI_DID_INTEL_PTL_U_H_UART0:
    case PCI_DID_INTEL_LNL_UART0:
    case PCI_DID_INTEL_ADP_P_UART0:
    case PCI_DID_INTEL_APL_UART0:
@@ -317,7 +318,8 @@
    case PCI_DID_INTEL_SPT_H_UART0:
    case PCI_DID_INTEL_CNP_H_UART0:
    	return "UAR0";
-	case PCI_DID_INTEL_PTL_UART1:
+	case PCI_DID_INTEL_PTL_H_UART1:
+	case PCI_DID_INTEL_PTL_U_H_UART1:
    case PCI_DID_INTEL_LNL_UART1:
    case PCI_DID_INTEL_ADP_P_UART1:
    case PCI_DID_INTEL_APL_UART1:
@@ -326,7 +328,8 @@
    case PCI_DID_INTEL_SPT_H_UART1:
    case PCI_DID_INTEL_CNP_H_UART1:
    	return "UAR1";
-	case PCI_DID_INTEL_PTL_UART2:
+	case PCI_DID_INTEL_PTL_H_UART2:
+	case PCI_DID_INTEL_PTL_U_H_UART2:
    case PCI_DID_INTEL_LNL_UART2:
    case PCI_DID_INTEL_ADP_P_UART2:
    case PCI_DID_INTEL_APL_UART2:
@@ -354,9 +357,12 @@
 };

static const unsigned short pci_device_ids[] = {
-	PCI_DID_INTEL_PTL_UART0,
-	PCI_DID_INTEL_PTL_UART1,
-	PCI_DID_INTEL_PTL_UART2,
+	PCI_DID_INTEL_PTL_H_UART0,
+	PCI_DID_INTEL_PTL_H_UART1,
+	PCI_DID_INTEL_PTL_H_UART2,
+	PCI_DID_INTEL_PTL_U_H_UART0,
+	PCI_DID_INTEL_PTL_U_H_UART1,
+	PCI_DID_INTEL_PTL_U_H_UART2,
    PCI_DID_INTEL_LNL_UART0,
    PCI_DID_INTEL_LNL_UART1,
    PCI_DID_INTEL_LNL_UART2,