Felix Held has uploaded this change for review. ( https://review.coreboot.org/c/coreboot/+/68634 )
Change subject: mb/google/kahlee: use override devicetrees for variants ......................................................................
mb/google/kahlee: use override devicetrees for variants
This helps with deduplicating the identical parts of the variant's devicetree's.
Signed-off-by: Felix Held felix-coreboot@felixheld.de Change-Id: Ie050c4624327b904e8cb0959b40421339e43f825 --- M src/mainboard/google/kahlee/Kconfig R src/mainboard/google/kahlee/variants/aleena/overridetree.cb A src/mainboard/google/kahlee/variants/baseboard/devicetree.cb R src/mainboard/google/kahlee/variants/careena/overridetree.cb R src/mainboard/google/kahlee/variants/grunt/overridetree.cb R src/mainboard/google/kahlee/variants/liara/overridetree.cb R src/mainboard/google/kahlee/variants/nuwani/overridetree.cb R src/mainboard/google/kahlee/variants/treeya/overridetree.cb 8 files changed, 65 insertions(+), 193 deletions(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/34/68634/1
diff --git a/src/mainboard/google/kahlee/Kconfig b/src/mainboard/google/kahlee/Kconfig index 10524fe..8c8486e 100644 --- a/src/mainboard/google/kahlee/Kconfig +++ b/src/mainboard/google/kahlee/Kconfig @@ -64,7 +64,10 @@ default "Treeya" if BOARD_GOOGLE_TREEYA
config DEVICETREE - default "variants/$(CONFIG_VARIANT_DIR)/devicetree.cb" + default "variants/baseboard/devicetree.cb" + +config OVERRIDE_DEVICETREE + default "variants/$(CONFIG_VARIANT_DIR)/overridetree.cb"
config MAINBOARD_FAMILY string diff --git a/src/mainboard/google/kahlee/variants/aleena/devicetree.cb b/src/mainboard/google/kahlee/variants/aleena/overridetree.cb similarity index 78% rename from src/mainboard/google/kahlee/variants/aleena/devicetree.cb rename to src/mainboard/google/kahlee/variants/aleena/overridetree.cb index 42c4017..7047598 100644 --- a/src/mainboard/google/kahlee/variants/aleena/devicetree.cb +++ b/src/mainboard/google/kahlee/variants/aleena/overridetree.cb @@ -1,13 +1,6 @@ # SPDX-License-Identifier: GPL-2.0-only
chip soc/amd/stoneyridge - register "spd_addr_lookup" = " - { - { {0xA0, 0x00} }, // socket 0 - Channel 0, slot 0 - }" - register "dram_clear_on_reset" = "DRAM_CONTENTS_KEEP" - register "uma_mode" = "UMAMODE_SPECIFIED_SIZE" - register "uma_size" = "32 * MiB" register "stapm_percent" = "80" register "stapm_time_ms" = "2500000" register "stapm_power_mw" = "7800" @@ -41,31 +34,15 @@ .fall_time_ns = 19, }"
- register "i2c_scl_reset" = "GPIO_I2C0_SCL | GPIO_I2C1_SCL | \ - GPIO_I2C2_SCL | GPIO_I2C3_SCL" - device domain 0 on - device ref iommu off end # IOMMU (Disabled for performance and battery) - device ref gfx on end - device ref gfx_hda on end - device ref gpp_bridge_1 on end # WLAN device ref gpp_bridge_3 on chip drivers/generic/bayhub register "power_saving" = "1" device pci 00.0 on end end end - device ref hda_bridge on end - device ref hda on end - device ref xhci on end - device ref ehci on end - device ref lpc_bridge on - chip ec/google/chromeec - device pnp 0c09.0 on end - end - end - device ref sdhci on end end #domain + device ref i2c_0 on chip drivers/generic/adau7002 device generic 0.0 on end @@ -95,14 +72,6 @@ device generic 0.1 on end end end - device ref i2c_1 on - chip drivers/i2c/tpm - register "hid" = ""GOOG0005"" - register "desc" = ""Cr50 TPM"" - register "irq_gpio" = "ACPI_GPIO_IRQ_EDGE_LOW(GPIO_9)" - device i2c 50 on end - end - end device ref i2c_2 on chip drivers/i2c/generic register "hid" = ""ELAN0000"" diff --git a/src/mainboard/google/kahlee/variants/baseboard/devicetree.cb b/src/mainboard/google/kahlee/variants/baseboard/devicetree.cb new file mode 100644 index 0000000..0400785 --- /dev/null +++ b/src/mainboard/google/kahlee/variants/baseboard/devicetree.cb @@ -0,0 +1,42 @@ + +# SPDX-License-Identifier: GPL-2.0-only + +chip soc/amd/stoneyridge + register "spd_addr_lookup" = " + { + { {0xA0, 0x00} }, // socket 0 - Channel 0, slot 0 + }" + register "dram_clear_on_reset" = "DRAM_CONTENTS_KEEP" + register "uma_mode" = "UMAMODE_SPECIFIED_SIZE" + register "uma_size" = "32 * MiB" + + register "i2c_scl_reset" = "GPIO_I2C0_SCL | GPIO_I2C1_SCL | \ + GPIO_I2C2_SCL | GPIO_I2C3_SCL" + + device domain 0 on + device ref iommu off end # IOMMU (Disabled for performance and battery) + device ref gfx on end + device ref gfx_hda on end + device ref gpp_bridge_1 on end # WLAN + device ref gpp_bridge_3 on end + device ref hda_bridge on end + device ref hda on end + device ref xhci on end + device ref ehci on end + device ref lpc_bridge on + chip ec/google/chromeec + device pnp 0c09.0 on end + end + end + device ref sdhci on end + end #domain + + device ref i2c_1 on + chip drivers/i2c/tpm + register "hid" = ""GOOG0005"" + register "desc" = ""Cr50 TPM"" + register "irq_gpio" = "ACPI_GPIO_IRQ_EDGE_LOW(GPIO_9)" + device i2c 50 on end + end + end +end #chip soc/amd/stoneyridge diff --git a/src/mainboard/google/kahlee/variants/careena/devicetree.cb b/src/mainboard/google/kahlee/variants/careena/overridetree.cb similarity index 82% rename from src/mainboard/google/kahlee/variants/careena/devicetree.cb rename to src/mainboard/google/kahlee/variants/careena/overridetree.cb index ece7403..82d2b99 100644 --- a/src/mainboard/google/kahlee/variants/careena/devicetree.cb +++ b/src/mainboard/google/kahlee/variants/careena/overridetree.cb @@ -1,13 +1,6 @@ # SPDX-License-Identifier: GPL-2.0-only
chip soc/amd/stoneyridge - register "spd_addr_lookup" = " - { - { {0xA0, 0x00} }, // socket 0 - Channel 0, slot 0 - }" - register "dram_clear_on_reset" = "DRAM_CONTENTS_KEEP" - register "uma_mode" = "UMAMODE_SPECIFIED_SIZE" - register "uma_size" = "32 * MiB" register "stapm_percent" = "68" register "stapm_time_ms" = "2500000" register "stapm_power_mw" = "7800" @@ -41,31 +34,15 @@ .fall_time_ns = 19, }"
- register "i2c_scl_reset" = "GPIO_I2C0_SCL | GPIO_I2C1_SCL | \ - GPIO_I2C2_SCL | GPIO_I2C3_SCL" - device domain 0 on - device ref iommu off end # IOMMU (Disabled for performance and battery) - device ref gfx on end - device ref gfx_hda on end - device ref gpp_bridge_1 on end # WLAN device ref gpp_bridge_3 on chip drivers/generic/bayhub register "power_saving" = "1" device pci 00.0 on end end end - device ref hda_bridge on end - device ref hda on end - device ref xhci on end - device ref ehci on end - device ref lpc_bridge on - chip ec/google/chromeec - device pnp 0c09.0 on end - end - end - device ref sdhci on end end #domain + device ref i2c_0 on chip drivers/generic/adau7002 register "wakeup_delay" = "20" @@ -111,14 +88,6 @@ device generic 0.1 on end end end - device ref i2c_1 on - chip drivers/i2c/tpm - register "hid" = ""GOOG0005"" - register "desc" = ""Cr50 TPM"" - register "irq_gpio" = "ACPI_GPIO_IRQ_EDGE_LOW(GPIO_9)" - device i2c 50 on end - end - end device ref i2c_2 on chip drivers/i2c/generic register "hid" = ""ELAN0000"" diff --git a/src/mainboard/google/kahlee/variants/grunt/devicetree.cb b/src/mainboard/google/kahlee/variants/grunt/overridetree.cb similarity index 76% rename from src/mainboard/google/kahlee/variants/grunt/devicetree.cb rename to src/mainboard/google/kahlee/variants/grunt/overridetree.cb index a230e00c..3185c4f 100644 --- a/src/mainboard/google/kahlee/variants/grunt/devicetree.cb +++ b/src/mainboard/google/kahlee/variants/grunt/overridetree.cb @@ -1,13 +1,6 @@ # SPDX-License-Identifier: GPL-2.0-only
chip soc/amd/stoneyridge - register "spd_addr_lookup" = " - { - { {0xA0, 0x00} }, // socket 0 - Channel 0, slot 0 - }" - register "dram_clear_on_reset" = "DRAM_CONTENTS_KEEP" - register "uma_mode" = "UMAMODE_SPECIFIED_SIZE" - register "uma_size" = "32 * MiB" register "stapm_percent" = "80" register "stapm_time_ms" = "2500000" register "stapm_power_mw" = "7800" @@ -41,31 +34,15 @@ .fall_time_ns = 50, }"
- register "i2c_scl_reset" = "GPIO_I2C0_SCL | GPIO_I2C1_SCL | \ - GPIO_I2C2_SCL | GPIO_I2C3_SCL" - device domain 0 on - device ref iommu off end # IOMMU (Disabled for performance and battery) - device ref gfx on end - device ref gfx_hda on end - device ref gpp_bridge_1 on end # WLAN device ref gpp_bridge_3 on chip drivers/generic/bayhub register "power_saving" = "1" device pci 00.0 on end end end - device ref hda_bridge on end - device ref hda on end - device ref xhci on end - device ref ehci on end - device ref lpc_bridge on - chip ec/google/chromeec - device pnp 0c09.0 on end - end - end - device ref sdhci on end end #domain + device ref i2c_0 on chip drivers/generic/adau7002 device generic 0.0 on end @@ -95,14 +72,6 @@ device generic 0.1 on end end end - device ref i2c_1 on - chip drivers/i2c/tpm - register "hid" = ""GOOG0005"" - register "desc" = ""Cr50 TPM"" - register "irq_gpio" = "ACPI_GPIO_IRQ_EDGE_LOW(GPIO_9)" - device i2c 50 on end - end - end device ref i2c_2 on chip drivers/i2c/generic register "hid" = ""ELAN0000"" diff --git a/src/mainboard/google/kahlee/variants/liara/devicetree.cb b/src/mainboard/google/kahlee/variants/liara/overridetree.cb similarity index 78% rename from src/mainboard/google/kahlee/variants/liara/devicetree.cb rename to src/mainboard/google/kahlee/variants/liara/overridetree.cb index 34c3fde..c565715 100644 --- a/src/mainboard/google/kahlee/variants/liara/devicetree.cb +++ b/src/mainboard/google/kahlee/variants/liara/overridetree.cb @@ -1,13 +1,6 @@ # SPDX-License-Identifier: GPL-2.0-only
chip soc/amd/stoneyridge - register "spd_addr_lookup" = " - { - { {0xA0, 0x00} }, // socket 0 - Channel 0, slot 0 - }" - register "dram_clear_on_reset" = "DRAM_CONTENTS_KEEP" - register "uma_mode" = "UMAMODE_SPECIFIED_SIZE" - register "uma_size" = "32 * MiB" register "lvds_poseq_varybl_to_blon" = "0x5" # in 4ms register "lvds_poseq_blon_to_varybl" = "0x5" # in 4ms
@@ -40,31 +33,15 @@ .fall_time_ns = 8, }"
- register "i2c_scl_reset" = "GPIO_I2C0_SCL | GPIO_I2C1_SCL | \ - GPIO_I2C2_SCL | GPIO_I2C3_SCL" - device domain 0 on - device ref iommu off end # IOMMU (Disabled for performance and battery) - device ref gfx on end - device ref gfx_hda on end - device ref gpp_bridge_1 on end # WLAN device ref gpp_bridge_3 on chip drivers/generic/bayhub register "power_saving" = "1" device pci 00.0 on end end end - device ref hda_bridge on end - device ref hda on end - device ref xhci on end - device ref ehci on end - device ref lpc_bridge on - chip ec/google/chromeec - device pnp 0c09.0 on end - end - end - device ref sdhci on end end #domain + device ref i2c_0 on chip drivers/generic/adau7002 register "wakeup_delay" = "20" @@ -95,14 +72,6 @@ device generic 0.1 on end end end - device ref i2c_1 on - chip drivers/i2c/tpm - register "hid" = ""GOOG0005"" - register "desc" = ""Cr50 TPM"" - register "irq_gpio" = "ACPI_GPIO_IRQ_EDGE_LOW(GPIO_9)" - device i2c 50 on end - end - end device ref i2c_2 on chip drivers/i2c/generic register "hid" = ""ELAN0000"" diff --git a/src/mainboard/google/kahlee/variants/nuwani/devicetree.cb b/src/mainboard/google/kahlee/variants/nuwani/overridetree.cb similarity index 83% rename from src/mainboard/google/kahlee/variants/nuwani/devicetree.cb rename to src/mainboard/google/kahlee/variants/nuwani/overridetree.cb index 894eb9d..adbf594 100644 --- a/src/mainboard/google/kahlee/variants/nuwani/devicetree.cb +++ b/src/mainboard/google/kahlee/variants/nuwani/overridetree.cb @@ -1,13 +1,6 @@ # SPDX-License-Identifier: GPL-2.0-only
chip soc/amd/stoneyridge - register "spd_addr_lookup" = " - { - { {0xA0, 0x00} }, // socket 0 - Channel 0, slot 0 - }" - register "dram_clear_on_reset" = "DRAM_CONTENTS_KEEP" - register "uma_mode" = "UMAMODE_SPECIFIED_SIZE" - register "uma_size" = "32 * MiB" register "stapm_percent" = "80" register "stapm_time_ms" = "2000000" register "stapm_power_mw" = "7800" @@ -44,14 +37,7 @@ .fall_time_ns = 8, }"
- register "i2c_scl_reset" = "GPIO_I2C0_SCL | GPIO_I2C1_SCL | \ - GPIO_I2C2_SCL | GPIO_I2C3_SCL" - device domain 0 on - device ref iommu off end # IOMMU (Disabled for performance and battery) - device ref gfx on end - device ref gfx_hda on end - device ref gpp_bridge_1 on end # WLAN device ref gpp_bridge_3 on chip drivers/generic/bayhub register "power_saving" = "1" @@ -59,17 +45,8 @@ device pci 00.0 on end end end - device ref hda_bridge on end - device ref hda on end - device ref xhci on end - device ref ehci on end - device ref lpc_bridge on - chip ec/google/chromeec - device pnp 0c09.0 on end - end - end - device ref sdhci on end end #domain + device ref i2c_0 on chip drivers/generic/adau7002 device generic 0.0 on end @@ -99,14 +76,6 @@ device generic 0.1 on end end end - device ref i2c_1 on - chip drivers/i2c/tpm - register "hid" = ""GOOG0005"" - register "desc" = ""Cr50 TPM"" - register "irq_gpio" = "ACPI_GPIO_IRQ_EDGE_LOW(GPIO_9)" - device i2c 50 on end - end - end device ref i2c_2 on chip drivers/i2c/generic register "hid" = ""ELAN0000"" diff --git a/src/mainboard/google/kahlee/variants/treeya/devicetree.cb b/src/mainboard/google/kahlee/variants/treeya/overridetree.cb similarity index 83% rename from src/mainboard/google/kahlee/variants/treeya/devicetree.cb rename to src/mainboard/google/kahlee/variants/treeya/overridetree.cb index e2f965a..6879ee5 100644 --- a/src/mainboard/google/kahlee/variants/treeya/devicetree.cb +++ b/src/mainboard/google/kahlee/variants/treeya/overridetree.cb @@ -1,13 +1,6 @@ # SPDX-License-Identifier: GPL-2.0-only
chip soc/amd/stoneyridge - register "spd_addr_lookup" = " - { - { {0xA0, 0x00} }, // socket 0 - Channel 0, slot 0 - }" - register "dram_clear_on_reset" = "DRAM_CONTENTS_KEEP" - register "uma_mode" = "UMAMODE_SPECIFIED_SIZE" - register "uma_size" = "32 * MiB" register "stapm_percent" = "80" register "stapm_time_ms" = "2000000" register "stapm_power_mw" = "7800" @@ -44,14 +37,7 @@ .fall_time_ns = 8, }"
- register "i2c_scl_reset" = "GPIO_I2C0_SCL | GPIO_I2C1_SCL | \ - GPIO_I2C2_SCL | GPIO_I2C3_SCL" - device domain 0 on - device ref iommu off end # IOMMU (Disabled for performance and battery) - device ref gfx on end - device ref gfx_hda on end - device ref gpp_bridge_1 on end # WLAN device ref gpp_bridge_3 on chip drivers/generic/bayhub register "power_saving" = "1" @@ -59,17 +45,8 @@ device pci 00.0 on end end end - device ref hda_bridge on end - device ref hda on end - device ref xhci on end - device ref ehci on end - device ref lpc_bridge on - chip ec/google/chromeec - device pnp 0c09.0 on end - end - end - device ref sdhci on end end #domain + device ref i2c_0 on chip drivers/generic/adau7002 device generic 0.0 on end @@ -114,14 +91,6 @@ device generic 0.1 on end end end - device ref i2c_1 on - chip drivers/i2c/tpm - register "hid" = ""GOOG0005"" - register "desc" = ""Cr50 TPM"" - register "irq_gpio" = "ACPI_GPIO_IRQ_EDGE_LOW(GPIO_9)" - device i2c 50 on end - end - end device ref i2c_2 on chip drivers/i2c/generic register "hid" = ""ELAN0000""