[coreboot-gerrit] Change in coreboot[master]: mb/*/*/devicetree.cb: Normalize disabled PIRQ values

[Angel Pons (Code Review)]

Hello build bot (Jenkins), Nico Huber, Tristan Corrick, Alexander Couzens, Patrick Rudolph,

I'd like you to reexamine a change. Please visit

https://review.coreboot.org/c/coreboot/+/43861

to look at the new patch set (#2).

Change subject: mb/*/*/devicetree.cb: Normalize disabled PIRQ values
......................................................................

mb/*/*/devicetree.cb: Normalize disabled PIRQ values

If bit 7 of a PIRQ route is set, it is disabled. Modern OSes don't use
PIRQ routing, so we might as well zero the other bits for consistency.

Tested on Asrock B85M Pro4 with SeaBIOS 1.13.0, still boots.

Change-Id: I78980b9ea5e878a6200df0f6c18c5e7d06a7950a
Signed-off-by: Angel Pons 
---
M src/mainboard/asrock/b85m_pro4/devicetree.cb
M src/mainboard/asrock/h81m-hds/devicetree.cb
M src/mainboard/asus/p5gc-mx/devicetree.cb
M src/mainboard/gigabyte/ga-945gcm-s2l/devicetree.cb
M src/mainboard/google/auron/devicetree.cb
M src/mainboard/google/beltino/devicetree.cb
M src/mainboard/google/jecht/devicetree.cb
M src/mainboard/google/slippy/devicetree.cb
M src/mainboard/intel/baskingridge/devicetree.cb
M src/mainboard/intel/wtm2/devicetree.cb
M src/mainboard/lenovo/t440p/devicetree.cb
M src/mainboard/supermicro/x10slm-f/devicetree.cb
12 files changed, 57 insertions(+), 57 deletions(-)

git pull ssh://review.coreboot.org:29418/coreboot refs/changes/61/43861/2