[coreboot-gerrit] [XS] Change in coreboot[main]: soc/intel/alderlake/romstage: Update PchHdaSdiEnable for AlderLakeN

[Dinesh Gehlot (Code Review)]

Dinesh Gehlot has uploaded this change for review. ( https://review.coreboot.org/c/coreboot/+/83428?usp=email )

Change subject: soc/intel/alderlake/romstage: Update PchHdaSdiEnable for AlderLakeN
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soc/intel/alderlake/romstage: Update PchHdaSdiEnable for AlderLakeN

This patch updates UPD PchHdaSdiEnable with default values. These UPD
values can be override via device tree to enable/disable HDA SDI lanes.

BUG=b:350931954
TEST=Boot verified google/tivviks

Change-Id: Ia413588e75fbbc11440d1cdf81532ef89f4dcf1e
Signed-off-by: Dinesh Gehlot 
---
M src/soc/intel/alderlake/romstage/fsp_params.c
1 file changed, 2 insertions(+), 0 deletions(-)

git pull ssh://review.coreboot.org:29418/coreboot refs/changes/28/83428/1

diff --git a/src/soc/intel/alderlake/romstage/fsp_params.c b/src/soc/intel/alderlake/romstage/fsp_params.c
index d917e6c..f3f55e73 100644
--- a/src/soc/intel/alderlake/romstage/fsp_params.c
+++ b/src/soc/intel/alderlake/romstage/fsp_params.c
@@ -251,7 +251,9 @@
    memset(m_cfg->PchHdaAudioLinkDmicEnable, 0, sizeof(m_cfg->PchHdaAudioLinkDmicEnable));
    memset(m_cfg->PchHdaAudioLinkSspEnable, 0, sizeof(m_cfg->PchHdaAudioLinkSspEnable));
    memset(m_cfg->PchHdaAudioLinkSndwEnable, 0, sizeof(m_cfg->PchHdaAudioLinkSndwEnable));
+#if CONFIG(SOC_INTEL_ALDERLAKE_PCH_N)
    memcpy(m_cfg->PchHdaSdiEnable, config->pch_hda_sdi_enable, sizeof(m_cfg->PchHdaSdiEnable));
+#endif
 }

static void fill_fspm_ish_params(FSP_M_CONFIG *m_cfg,