Attention is currently required from: Jason Glenesk, Raul Rangel, Matt DeVillier, Arthur Heymans, Martin Roth, Felix Held.
Fred Reitberger has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/71563 )
Change subject: soc/amd/fch_spi: Inline spi_bar read and writes
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Patch Set 1:
(1 comment)
Commit Message:
https://review.coreboot.org/c/coreboot/+/71563/comment/c9c0ea2c_a2e15c50
PS1, Line 25: 16-19ms
That's crazy... Why? Was calling a function really that expensive? […]
Looks like these util functions are still used in a few other files (fch_spi.c and glinda/mendocino/morgana espi_util.c from a quick grep search), though it would be nice if they all could be inlined.
Is there much of a speed difference on warm boots where the APOB is not rewritten?
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