[coreboot-gerrit] Change in coreboot[master]: soc/intel/tgl: Allow setting PCIe subsystem IDs after FSP-S

[build bot (Jenkins) (Code Review)]

Attention is currently required from: Tim Wawrzynczak, Patrick Rudolph.
build bot (Jenkins) has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/56867 )

Change subject: soc/intel/tgl: Allow setting PCIe subsystem IDs after FSP-S
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Patch Set 1:

(2 comments)

File src/soc/intel/tigerlake/fsp_params.c:

Robot Comment from checkpatch (run ID jenkins-coreboot-checkpatch-125903):
https://review.coreboot.org/c/coreboot/+/56867/comment/985da1fa_7e555b94 
PS1, Line 640: 				uint64_t :4;
space prohibited before that ':' (ctx:WxV)

Robot Comment from checkpatch (run ID jenkins-coreboot-checkpatch-125903):
https://review.coreboot.org/c/coreboot/+/56867/comment/c01c7548_83fc3dd2 
PS1, Line 642: 				uint64_t :16;
space prohibited before that ':' (ctx:WxV)