[coreboot-gerrit] [S] Change in coreboot[main]: soc/intel/common/block/acpi: Add GPE1 blocks to ACPI FADT table

[Cliff Huang (Code Review)]

Attention is currently required from: Anil Kumar K, Bora Guvendik, Hannah Williams, Subrata Banik.

Cliff Huang has posted comments on this change by Cliff Huang. ( https://review.coreboot.org/c/coreboot/+/84103?usp=email )

Change subject: soc/intel/common/block/acpi: Add GPE1 blocks to ACPI FADT table
......................................................................

Patch Set 5:

(3 comments)

File src/soc/intel/common/block/acpi/Kconfig:

https://review.coreboot.org/c/coreboot/+/84103/comment/35fe4c14_17570f64?usp... :
PS5, Line 87: 	  devices.
> u should also mention that GPE1 Event Bit is an extension of GPE0 (present in all Intel SoC platform […]

sure. will do this. thx.

File src/soc/intel/common/block/acpi/acpi.c:

https://review.coreboot.org/c/coreboot/+/84103/comment/99c1205d_bcbce764?usp... :
PS5, Line 29: GPE1_STS
> this won't work. I believe you can use Kconfig over macro. that is more clean solution.

sure. will make the change.

https://review.coreboot.org/c/coreboot/+/84103/comment/a8002397_cac57eec?usp... :
PS5, Line 114: GPE1_STS(0)
>

Subrata,

I will need to use #if instead. I got this error if GPE1_STS macro is not defined.

src/soc/intel/common/block/acpi/acpi.c:110:84: error: implicit declaration of function 'GPE1_STS'; did you mean 'GPE0_STS'? [-Werror=implicit-function-declaration]
  110 |         fadt->gpe1_blk =  CONFIG(SOC_INTEL_COMMON_BLOCK_ACPI_USE_GPE1) ? (pmbase + GPE1_STS(0)) :  GPE1_STS(0);
      |                                                                                    ^~~~~~~~

any thought? let me switch for the next patchset first.