Jayvik Desai has uploaded this change for review. ( https://review.coreboot.org/c/coreboot/+/85722?usp=email )
Change subject: [DO NOT MERGE] google/brya: enable indexed memmap access for trulo ......................................................................
[DO NOT MERGE] google/brya: enable indexed memmap access for trulo
enable "EC_GOOGLE_CHROMEEC_MEMMAP_INDEXED_IO" and select the port address for indexed i/O access for trulo
BUG=b:379224648 TEST= able to build nissa/trulo and verified kconfig selection in coreboot.config output file.
Change-Id: Id8fb656af3fdea5361d318c454e1b607ca96ab6c Signed-off-by: Jayvik Desai jayvik@google.com --- M src/mainboard/google/brya/Kconfig 1 file changed, 4 insertions(+), 0 deletions(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/22/85722/1
diff --git a/src/mainboard/google/brya/Kconfig b/src/mainboard/google/brya/Kconfig index 6f9f5b5..d511b15 100644 --- a/src/mainboard/google/brya/Kconfig +++ b/src/mainboard/google/brya/Kconfig @@ -109,6 +109,7 @@ select DRIVERS_AUDIO_SOF select DRIVERS_INTEL_ISH select DRIVER_INTEL_ISH_HAS_MAIN_FW + select EC_GOOGLE_CHROMEEC_MEMMAP_INDEXED_IO select MAINBOARD_DISABLE_STAGE_CACHE select MAINBOARD_HAS_EARLY_LIBGFXINIT select MEMORY_SOLDERDOWN @@ -997,6 +998,9 @@ config VBOOT select VBOOT_EARLY_EC_SYNC if !(BOARD_GOOGLE_BASEBOARD_NISSA || BOARD_GOOGLE_BASEBOARD_TRULO) select VBOOT_LID_SWITCH +config EC_GOOGLE_CHROMEEC_MEMMAP_INDEXED_IO_PORT + hex + default 0x380 if BOARD_GOOGLE_BASEBOARD_TRULO
config UART_FOR_CONSOLE int