Attention is currently required from: Tim Wawrzynczak, Sridhar Siricilla, Werner Zeh, Patrick Rudolph. Subrata Banik has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/61520 )
Change subject: soc/intel/common/cse: Add function to perform CSE lock configuration ......................................................................
Patch Set 6:
(1 comment)
File src/soc/intel/common/block/cse/cse.c:
https://review.coreboot.org/c/coreboot/+/61520/comment/db015e0c_0e49cd79 PS6, Line 1018: (cse_is_hfs1_com_normal() || cse_is_hfs1_com_soft_temp_disable())
**When CSE is always in bad state then how can one follow #2 so the only way is #1 hence, we should avoid locking the PMC cf9.**
Per the guide, when CSE is in bad state, global reset to be used.
Can you please share what is the step to perform the global reset when CSE is in bad state ? and if BIOS lock PMC ETR3 bit 31 without bothering about CSE state using pmc_global_reset_disable_and_lock() (as you have suggested) then how can platform issue global reset ?
Please note OS can't use neither GLOBAL RESET MEI message and global reset PCH register set.
The point is platform want to prohibit OS from sending global reset then the lock is required.
Ideally the flow would look like this may be 1. Platform is booting and BIOS check the CSE state and MFG mode and if all good then lock the PMC ETR3 knowing that if we still need global reset then MEI message can be used but prohibit OS to trigger global reset using 0xcf9 bit 31.
2. In case, BIOS detects CSE is in bad state then skip locking the CF9 global reset to allow BIOS to perform global reset using 0xcf9 port. Looking at https://elixir.bootlin.com/linux/v5.15.19/source/drivers/platform/x86/intel/... code, kernel is actually attempting to set the global reset bit. hence, follow up any cf9 write 0x6/0xe may trigger global reset to host and CSE partition as well.
I think we should unconditionally lock the cf9lock irrespective CSE enable or disable. I will address this in next revision.
I don't see any reason OS wants to use global reset as mentioned in the ME BWG. The section# 3.5.1, we are referring is, guidelines on usage of global reset & GLOBAL RESET MEI message.
Other section# 3.6.2 refers, when global reset (triggered through setting PCH registers) shouldn't be locked (if HFSTS1[4] is set).