Hello build bot (Jenkins), Furquan Shaikh, Wonkyu Kim, Maulik V Vaghela, Nick Vaccaro, Aamir Bohra, Srinidhi N Kaushik, Patrick Rudolph,
I'd like you to reexamine a change. Please visit
https://review.coreboot.org/c/coreboot/+/39313
to look at the new patch set (#12).
Change subject: soc/intel/tigerlake: Remove redundant code from graphics.c ......................................................................
soc/intel/tigerlake: Remove redundant code from graphics.c
It looks like kernel was relying on BIOS setting DDI_A_4_LANES when it was doing the max lane calculation if platform has older graphics
With newer graphics, portA and portE no longer seem to share the lanes. Hence, kernel assumes that eDP is using 4-lanes. So kernel driver for these platforms relies on BIOS setting DDI_A_4_LANES for it.Hence removing this code from coreboot
BUG=b:150788968 BRANCH=None TEST=checked jslrvp and tglrvp compilation and boot.
Change-Id: I32692501b60f48a07b8fbb9bb3a755b18f4b3ea9 Signed-off-by: Ronak Kanabar ronak.kanabar@intel.com --- M src/soc/intel/tigerlake/graphics.c 1 file changed, 0 insertions(+), 13 deletions(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/13/39313/12