Maciej Matuszczyk has uploaded this change for review. ( https://review.coreboot.org/c/coreboot/+/35864 )
Change subject: mb/lenovo/{t60,r60}: Add ThinkPad R60 support as variant board ......................................................................
mb/lenovo/{t60,r60}: Add ThinkPad R60 support as variant board
- It can be 100 % Open Source. - Untested on boards with external Radeon graphics adapter. - Some columns on the left-most side of display are completely black on 1400x1050 IPS display[1]. Display works fine on Linux. I don't why it appears like that. - Only GRUB2 and SeaBIOS payloads tested for now. - 2504 docking station USB doesn't work under Linux. Can detect pendrive in GRUB2 payload. - Sometimes it takes 20s of "pretending it's powered off" to run coreboot code. Issue is payload agnostic. Might be fact that my unit is missing one of power line filtering capacitors.
Image of issue with the screen: [1] https://imgur.com/a/0wpMGsm
Change-Id: Ibd9208a5eafd228f8eedbc8fb4f4eb9ed1932a14 Signed-off-by: Maccraft maccraft123mc@gmail.com --- M Documentation/mainboard/index.md A Documentation/mainboard/lenovo/r60.md M src/mainboard/lenovo/t60/variants/r60/gpio.c M src/mainboard/lenovo/t60/variants/t60/gpio.c 4 files changed, 72 insertions(+), 139 deletions(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/64/35864/1
diff --git a/Documentation/mainboard/index.md b/Documentation/mainboard/index.md index 83189757..fb9cf05 100644 --- a/Documentation/mainboard/index.md +++ b/Documentation/mainboard/index.md @@ -65,6 +65,7 @@
- [Mainboard codenames](lenovo/codenames.md) - [Hardware Maintenance Manual of ThinkPads](lenovo/thinkpad_hmm.md) +- [R60](lenovo/r60.md) - [T4xx common](lenovo/t4xx_series.md) - [X2xx common](lenovo/x2xx_series.md)
diff --git a/Documentation/mainboard/lenovo/r60.md b/Documentation/mainboard/lenovo/r60.md new file mode 100644 index 0000000..73fdcce --- /dev/null +++ b/Documentation/mainboard/lenovo/r60.md @@ -0,0 +1,38 @@ +# Lenovo ThinkPad R60 + +https://imgur.com/a/0wpMGsm + +Untested on boards with external Radeon graphics adapter. If you have such board, proceed at your own risk and document if it does work. It should work, but no one tested it yet. + +# Flashing instructions + +## External flashing + +The flash IC is located at the bottom center of the mainboard. Access to the flash chip is blocked by the magnesium frame, so you need to disassemble the entire laptop and remove the mainboard. + +To disassemble the laptop, follow the Hardware Maintenance Manual. +https://thinkpads.com/support/hmm/hmm_pdf/42x3749_02.pdf + +## Internal flashing on Vendor BIOS + +You might be able to flash R60 using T60 method involving running bucts program, but this is untested. + +## Updating coreboot + +After installing coreboot all lenovo bios flashing restrictions are lifted. Flashrom should be able to flash new coreboot.rom without any problems. + +## Things working: + +- Intel WiFi card. +- Suspend and resume. +- Native graphics initialization. +- GRUB2 and SeaBIOS payloads. +- Reflashing with flashrom (use flashrom-git as of 17.09.2019). +- 2G+1G memory configuration working. + +## Things not working: + +- 2504 dock USB ports under Linux. It can detect pendrive on GRUB2 payload if not hotplugged. +- Several pixel black bar at the left side of screen. Doesn't appear in Linux. See picture. +- Rfkill button behaviour is inverted. Might be fact that T60 chassis has it inverted in comparison +- Sometimes it takes several second to run coreboot. Just wait. Might be an outdated EC firmware or missing capacitor on my unit diff --git a/src/mainboard/lenovo/t60/variants/r60/gpio.c b/src/mainboard/lenovo/t60/variants/r60/gpio.c index f220b2b..3317e2e 100644 --- a/src/mainboard/lenovo/t60/variants/r60/gpio.c +++ b/src/mainboard/lenovo/t60/variants/r60/gpio.c @@ -1,7 +1,7 @@ /* * This file is part of the coreboot project. * - * Copyright (C) 2016 Arthur Heymans arthur@aheymans.xyz + * Copyright (C) 2019 Maciej Matuszczyk maccraft123mc@gmail.com. * * This program is free software; you can redistribute it and/or modify * it under the terms of the GNU General Public License as published by @@ -16,7 +16,7 @@ #include <southbridge/intel/common/gpio.h>
static const struct pch_gpio_set1 pch_gpio_set1_mode = { - .gpio1 = GPIO_MODE_GPIO, + .gpio1 = GPIO_MODE_GPIO, /* HDD_DTCT */ .gpio6 = GPIO_MODE_GPIO, /* LEGACYIO# */ .gpio7 = GPIO_MODE_GPIO, /* BDC_PRESENCE# */ .gpio8 = GPIO_MODE_GPIO, /* H8_WAKE# */ @@ -26,8 +26,9 @@ .gpio13 = GPIO_MODE_GPIO, .gpio14 = GPIO_MODE_GPIO, /* CPUSB# */ .gpio15 = GPIO_MODE_GPIO, /* CPPE# */ - .gpio19 = GPIO_MODE_GPIO, - .gpio22 = GPIO_MODE_GPIO, + .gpio19 = GPIO_MODE_GPIO, /* GBE_RST# */ + .gpio21 = GPIO_MODE_GPIO, /* LCD_PRESENCE */ + .gpio22 = GPIO_MODE_GPIO, /* FWH_WP */ .gpio24 = GPIO_MODE_GPIO, .gpio25 = GPIO_MODE_GPIO, /* MDC_KILL# */ .gpio26 = GPIO_MODE_GPIO, @@ -47,7 +48,8 @@ .gpio14 = GPIO_DIR_INPUT, .gpio15 = GPIO_DIR_INPUT, .gpio19 = GPIO_DIR_OUTPUT, - .gpio22 = GPIO_DIR_INPUT, + .gpio21 = GPIO_DIR_INPUT, + .gpio22 = GPIO_DIR_OUTPUT, .gpio24 = GPIO_DIR_OUTPUT, .gpio25 = GPIO_DIR_OUTPUT, .gpio26 = GPIO_DIR_OUTPUT, @@ -73,26 +75,32 @@ .gpio13 = GPIO_INVERT, };
-static const struct pch_gpio_set1 pch_gpio_set1_blink = { +const struct pch_gpio_set1 pch_gpio_set1_blink = { };
static const struct pch_gpio_set2 pch_gpio_set2_mode = { + .gpio34 = GPIO_MODE_GPIO, /* SMB_3B_EN */ .gpio36 = GPIO_MODE_GPIO, /*PLANARID0 */ .gpio37 = GPIO_MODE_GPIO, /*PLANARID1 */ .gpio38 = GPIO_MODE_GPIO, /*PLANARID2 */ .gpio39 = GPIO_MODE_GPIO, /*PLANARID3 */ - .gpio48 = GPIO_MODE_GPIO, + .gpio48 = GPIO_MODE_GPIO, /* FWH_TBL */ + };
static const struct pch_gpio_set2 pch_gpio_set2_direction = { + .gpio34 = GPIO_DIR_INPUT, .gpio36 = GPIO_DIR_INPUT, .gpio37 = GPIO_DIR_INPUT, .gpio38 = GPIO_DIR_INPUT, .gpio39 = GPIO_DIR_INPUT, .gpio48 = GPIO_DIR_OUTPUT, + };
static const struct pch_gpio_set2 pch_gpio_set2_level = { + .gpio33 = GPIO_LEVEL_LOW, + .gpio35 = GPIO_LEVEL_HIGH, .gpio48 = GPIO_LEVEL_HIGH, };
@@ -101,7 +109,6 @@ .mode = &pch_gpio_set1_mode, .direction = &pch_gpio_set1_direction, .level = &pch_gpio_set1_level, - .blink = &pch_gpio_set1_blink, .invert = &pch_gpio_set1_invert, }, .set2 = { diff --git a/src/mainboard/lenovo/t60/variants/t60/gpio.c b/src/mainboard/lenovo/t60/variants/t60/gpio.c index 1f527b7..f220b2b 100644 --- a/src/mainboard/lenovo/t60/variants/t60/gpio.c +++ b/src/mainboard/lenovo/t60/variants/t60/gpio.c @@ -1,225 +1,112 @@ /* - * This file is part of the coreboot project. - * - - * Copyright (C) 2019 Maciej Matuszczyk maccraft123mc@gmail.com. - + * Copyright (C) 2016 Arthur Heymans arthur@aheymans.xyz * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License as published by - * the Free Software Foundation; version 2 of the License. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - */ - - + #include <southbridge/intel/common/gpio.h> - - + static const struct pch_gpio_set1 pch_gpio_set1_mode = { - - .gpio1 = GPIO_MODE_GPIO, /* HDD_DTCT */ - + .gpio1 = GPIO_MODE_GPIO, .gpio6 = GPIO_MODE_GPIO, /* LEGACYIO# */ - .gpio7 = GPIO_MODE_GPIO, /* BDC_PRESENCE# */ - .gpio8 = GPIO_MODE_GPIO, /* H8_WAKE# */ - .gpio9 = GPIO_MODE_GPIO, - .gpio10 = GPIO_MODE_GPIO, /* MDI_DETECT */ - .gpio12 = GPIO_MODE_GPIO, /* H8SCI# */ - .gpio13 = GPIO_MODE_GPIO, - .gpio14 = GPIO_MODE_GPIO, /* CPUSB# */ - .gpio15 = GPIO_MODE_GPIO, /* CPPE# */ - - .gpio19 = GPIO_MODE_GPIO, /* GBE_RST# */ - - .gpio21 = GPIO_MODE_GPIO, /* LCD_PRESENCE */ - - .gpio22 = GPIO_MODE_GPIO, /* FWH_WP */ - + .gpio19 = GPIO_MODE_GPIO, + .gpio22 = GPIO_MODE_GPIO, .gpio24 = GPIO_MODE_GPIO, - .gpio25 = GPIO_MODE_GPIO, /* MDC_KILL# */ - .gpio26 = GPIO_MODE_GPIO, - .gpio27 = GPIO_MODE_GPIO, /* EXC_PWR_CTRL */ - .gpio28 = GPIO_MODE_GPIO, /* EXC_AUX_CTRL */ - }; - - + static const struct pch_gpio_set1 pch_gpio_set1_direction = { - .gpio1 = GPIO_DIR_INPUT, - .gpio6 = GPIO_DIR_INPUT, - .gpio7 = GPIO_DIR_INPUT, - .gpio8 = GPIO_DIR_INPUT, - .gpio9 = GPIO_DIR_INPUT, - .gpio10 = GPIO_DIR_INPUT, - .gpio12 = GPIO_DIR_INPUT, - .gpio13 = GPIO_DIR_INPUT, - .gpio14 = GPIO_DIR_INPUT, - .gpio15 = GPIO_DIR_INPUT, - .gpio19 = GPIO_DIR_OUTPUT, - - .gpio21 = GPIO_DIR_INPUT, - - .gpio22 = GPIO_DIR_OUTPUT, - + .gpio22 = GPIO_DIR_INPUT, .gpio24 = GPIO_DIR_OUTPUT, - .gpio25 = GPIO_DIR_OUTPUT, - .gpio26 = GPIO_DIR_OUTPUT, - .gpio27 = GPIO_DIR_OUTPUT, - .gpio28 = GPIO_DIR_OUTPUT, - }; - - + static const struct pch_gpio_set1 pch_gpio_set1_level = { - .gpio19 = GPIO_LEVEL_HIGH, - .gpio24 = GPIO_LEVEL_HIGH, - .gpio25 = GPIO_LEVEL_HIGH, - .gpio26 = GPIO_LEVEL_LOW, - .gpio27 = GPIO_LEVEL_HIGH, - .gpio28 = GPIO_LEVEL_HIGH, - }; - - + static const struct pch_gpio_set1 pch_gpio_set1_invert = { - .gpio1 = GPIO_INVERT, - .gpio6 = GPIO_INVERT, - .gpio7 = GPIO_INVERT, - .gpio8 = GPIO_INVERT, - .gpio12 = GPIO_INVERT, - .gpio13 = GPIO_INVERT, - }; - - -const struct pch_gpio_set1 pch_gpio_set1_blink = { - + +static const struct pch_gpio_set1 pch_gpio_set1_blink = { }; - - + static const struct pch_gpio_set2 pch_gpio_set2_mode = { - - .gpio34 = GPIO_MODE_GPIO, /* SMB_3B_EN */ - .gpio36 = GPIO_MODE_GPIO, /*PLANARID0 */ - .gpio37 = GPIO_MODE_GPIO, /*PLANARID1 */ - .gpio38 = GPIO_MODE_GPIO, /*PLANARID2 */ - .gpio39 = GPIO_MODE_GPIO, /*PLANARID3 */ - - .gpio48 = GPIO_MODE_GPIO, /* FWH_TBL */ - - + .gpio48 = GPIO_MODE_GPIO, }; - - + static const struct pch_gpio_set2 pch_gpio_set2_direction = { - - .gpio34 = GPIO_DIR_INPUT, - .gpio36 = GPIO_DIR_INPUT, - .gpio37 = GPIO_DIR_INPUT, - .gpio38 = GPIO_DIR_INPUT, - .gpio39 = GPIO_DIR_INPUT, - .gpio48 = GPIO_DIR_OUTPUT, - - }; - - + static const struct pch_gpio_set2 pch_gpio_set2_level = { - - .gpio33 = GPIO_LEVEL_LOW, - - .gpio35 = GPIO_LEVEL_HIGH, - .gpio48 = GPIO_LEVEL_HIGH, - }; - - + const struct pch_gpio_map mainboard_gpio_map = { - .set1 = { - .mode = &pch_gpio_set1_mode, - .direction = &pch_gpio_set1_direction, - .level = &pch_gpio_set1_level, - + .blink = &pch_gpio_set1_blink, .invert = &pch_gpio_set1_invert, - }, - .set2 = { - .mode = &pch_gpio_set2_mode, - .direction = &pch_gpio_set2_direction, - .level = &pch_gpio_set2_level, - }, - };