Attention is currently required from: Balaji Manigandan, Jakub Czapiga, Jędrzej Ciupis, Matt DeVillier, Pratikkumar V Prajapati, Sowmya Aralguppe.
Subrata Banik has posted comments on this change by Matt DeVillier. ( https://review.coreboot.org/c/coreboot/+/84359?usp=email )
Change subject: mb/google/dedede: Select INTEL_CRASHLOG only for ChromeOS builds ......................................................................
Patch Set 2:
(2 comments)
Patchset:
PS2: Hello Intel Team,
Can You please help to take a look into Crashlog error in JSL. Wondering if you have ever tested crashlog on JSL devices ?
File src/mainboard/google/dedede/Kconfig:
https://review.coreboot.org/c/coreboot/+/84359/comment/d40f9019_27a3d9a4?usp... : PS1, Line 39: select SOC_INTEL_CRASHLOG
to the problem that you faced while booting windows/linux on jsl Chromebook.
actually, it seems to have nothing to do with OS or even payload; crashlog is just broken under JSL with upstream coreboot:
[DEBUG] cmd_reg from pmc_make_ipc_cmd 1052838 [ERROR] Null dereference at eip: 0x76ac8512 [ERROR] Null dereference at eip: 0x76ac85ea [ERROR] Null dereference at eip: 0x76ac610c [DEBUG] PMC crashlog size in legacy mode = 0xd00 [DEBUG] Read ID for Telemetry: 0x0 differs from expected: 0x23 [ERROR] CPU crashlog capability not found. [DEBUG] PMC crashLog size in legacy mode : 0xD00 [DEBUG] Invalid data 0x0 at offset 0x1300 from addr 0xfe010000 of PMC SRAM. [DEBUG] legacy mode PMC crashlog size adjusted to: 0x0 [DEBUG] m_cpu_crashLog_size : 0x0 bytes [DEBUG] Skipping CPU crashLog collection. Data not present.
unless this is expected behavior
CB:83884 tries to enable crashlog for JSL. I will talk to Intel team if they can take a look into it.