[coreboot-gerrit] [XS] Change in coreboot[main]: soc/intel/pantherlake: Keep image clock configuration enable

[Subrata Banik (Code Review)]

Subrata Banik has submitted this change. ( https://review.coreboot.org/c/coreboot/+/85588?usp=email )

Change subject: soc/intel/pantherlake: Keep image clock configuration enable
......................................................................

soc/intel/pantherlake: Keep image clock configuration enable

The ImguClkOutEn parameters are required in pantherlake, therefore,
avoid disabling the IMGU CLKOUT FSP UPDs.

BUG=b:381044394
TEST=Able to see FSP-M UPDs for google/fatcat where IMGU CLKOUTs are
not disabled with this patch.

Change-Id: Ieb022e6dc0b64106ff30f56cd17f9f219276785f
Signed-off-by: Subrata Banik 
Reviewed-on: https://review.coreboot.org/c/coreboot/+/85588
Reviewed-by: Kapil Porwal 
Tested-by: build bot (Jenkins) 
---
M src/soc/intel/pantherlake/romstage/fsp_params.c
1 file changed, 0 insertions(+), 3 deletions(-)

Approvals:
  build bot (Jenkins): Verified
  Kapil Porwal: Looks good to me, approved

diff --git a/src/soc/intel/pantherlake/romstage/fsp_params.c b/src/soc/intel/pantherlake/romstage/fsp_params.c
index 83481a0..7076aef 100644
--- a/src/soc/intel/pantherlake/romstage/fsp_params.c
+++ b/src/soc/intel/pantherlake/romstage/fsp_params.c
@@ -115,9 +115,6 @@
 static void fill_fspm_ipu_params(FSP_M_CONFIG *m_cfg,
    			 const struct soc_intel_pantherlake_config *config)
 {
-	/* Image clock: disable all clocks for bypassing FSP pin mux */
-	memset(m_cfg->ImguClkOutEn, 0, sizeof(m_cfg->ImguClkOutEn));
-
    /* IPU */
    m_cfg->SaIpuEnable = is_devfn_enabled(PCI_DEVFN_IPU);
 }