[coreboot-gerrit] Change in coreboot[master]: soc/amd/common/block/lpc: Add config options for eSPI

[Furquan Shaikh (Code Review)]

Furquan Shaikh has submitted this change. ( https://review.coreboot.org/c/coreboot/+/41069 )

Change subject: soc/amd/common/block/lpc: Add config options for eSPI
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soc/amd/common/block/lpc: Add config options for eSPI

eSPI on Picasso is configured using the LPC bridge configuration
registers. This change enables config options to allow SoC to select
if it supports eSPI (SOC_AMD_COMMON_BLOCK_HAS_ESPI) and mainboard to
select if it wants to use eSPI instead of LPC for talking to legacy
devices and embedded controllers (SOC_AMD_COMMON_BLOCK_USE_ESPI).

BUG=b:154445472

Change-Id: I15e9eb25706e09393c019eea4d61b66f17490be6
Signed-off-by: Furquan Shaikh 
Reviewed-on: https://review.coreboot.org/c/coreboot/+/41069
Reviewed-by: Raul Rangel 
Reviewed-by: Aaron Durbin 
Tested-by: build bot (Jenkins) 
---
M src/soc/amd/common/block/lpc/Kconfig
1 file changed, 15 insertions(+), 0 deletions(-)

Approvals:
  build bot (Jenkins): Verified
  Aaron Durbin: Looks good to me, approved
  Raul Rangel: Looks good to me, approved

diff --git a/src/soc/amd/common/block/lpc/Kconfig b/src/soc/amd/common/block/lpc/Kconfig
index 3cfbfe5d..1ec8dd4 100644
--- a/src/soc/amd/common/block/lpc/Kconfig
+++ b/src/soc/amd/common/block/lpc/Kconfig
@@ -9,3 +9,18 @@
    default n
    help
      Select this option if the LPC bridge supports ROM sharing.
+
+config SOC_AMD_COMMON_BLOCK_HAS_ESPI
+	bool
+	default n
+	help
+	  Select this option if platform supports eSPI using D14F3 configuration
+	  registers.
+
+config SOC_AMD_COMMON_BLOCK_USE_ESPI
+	bool
+	depends on SOC_AMD_COMMON_BLOCK_HAS_ESPI
+	default n
+	help
+	  Select this option if mainboard uses eSPI instead of LPC (if supported
+	  by platform).