Marshall Dawson has uploaded this change for review. ( https://review.coreboot.org/23724
Change subject: amd/stoneyridge: Move model_15_init.c to cpu.c ......................................................................
amd/stoneyridge: Move model_15_init.c to cpu.c
Move the remaining model_15_init.c functionality to cpu.c, making it similar to other soc implementations.
Change-Id: Ic8c62b09209fcdaa50ff8ffc7773ef155f979a1b Signed-off-by: Marshall Dawson marshalldawson3rd@gmail.com --- M src/soc/amd/stoneyridge/Makefile.inc M src/soc/amd/stoneyridge/cpu.c D src/soc/amd/stoneyridge/model_15_init.c 3 files changed, 31 insertions(+), 60 deletions(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/24/23724/1
diff --git a/src/soc/amd/stoneyridge/Makefile.inc b/src/soc/amd/stoneyridge/Makefile.inc index 59405de..aae30ea 100644 --- a/src/soc/amd/stoneyridge/Makefile.inc +++ b/src/soc/amd/stoneyridge/Makefile.inc @@ -92,7 +92,6 @@ ramstage-y += sb_util.c ramstage-$(CONFIG_STONEYRIDGE_IMC_FWM) += imc.c ramstage-y += lpc.c -ramstage-y += model_15_init.c ramstage-y += northbridge.c ramstage-y += pmutil.c ramstage-y += reset.c diff --git a/src/soc/amd/stoneyridge/cpu.c b/src/soc/amd/stoneyridge/cpu.c index 5042cbc..14b6881 100644 --- a/src/soc/amd/stoneyridge/cpu.c +++ b/src/soc/amd/stoneyridge/cpu.c @@ -18,6 +18,7 @@ #include <cpu/x86/mp.h> #include <cpu/x86/mtrr.h> #include <cpu/x86/msr.h> +#include <cpu/x86/lapic.h> #include <cpu/amd/amdfam15.h> #include <device/device.h> #include <soc/pci_devs.h> @@ -113,3 +114,33 @@ if (mp_init_with_smm(dev->link_list, &mp_ops) < 0) printk(BIOS_ERR, "MP initialization failure.\n"); } + +static void model_15_init(device_t dev) +{ + printk(BIOS_DEBUG, "Model 15 Init.\n"); + + int i; + msr_t msr; + + /* zero the machine check error status registers */ + msr.lo = 0; + msr.hi = 0; + for (i = 0 ; i < 6 ; i++) + wrmsr(MCI_STATUS + (i * 4), msr); + + setup_lapic(); +} + +static struct device_operations cpu_dev_ops = { + .init = model_15_init, +}; + +static struct cpu_device_id cpu_table[] = { + { X86_VENDOR_AMD, 0x670f00 }, + { 0, 0 }, +}; + +static const struct cpu_driver model_15 __cpu_driver = { + .ops = &cpu_dev_ops, + .id_table = cpu_table, +}; diff --git a/src/soc/amd/stoneyridge/model_15_init.c b/src/soc/amd/stoneyridge/model_15_init.c deleted file mode 100644 index 83fadd0..0000000 --- a/src/soc/amd/stoneyridge/model_15_init.c +++ /dev/null @@ -1,59 +0,0 @@ -/* - * This file is part of the coreboot project. - * - * Copyright (C) 2015-2016 Advanced Micro Devices, Inc. - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License as published by - * the Free Software Foundation; version 2 of the License. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - */ - -#include <console/console.h> -#include <cpu/x86/lapic.h> -#include <cpu/x86/msr.h> -#include <device/device.h> -#include <device/pci.h> -#include <string.h> -#include <cpu/x86/msr.h> -#include <cpu/x86/pae.h> -#include <pc80/mc146818rtc.h> - -#include <cpu/cpu.h> -#include <cpu/x86/cache.h> -#include <cpu/amd/amdfam15.h> -#include <arch/acpi.h> - -static void model_15_init(device_t dev) -{ - printk(BIOS_DEBUG, "Model 15 Init.\n"); - - int i; - msr_t msr; - - /* zero the machine check error status registers */ - msr.lo = 0; - msr.hi = 0; - for (i = 0 ; i < 6 ; i++) - wrmsr(MCI_STATUS + (i * 4), msr); - - setup_lapic(); -} - -static struct device_operations cpu_dev_ops = { - .init = model_15_init, -}; - -static const struct cpu_device_id cpu_table[] = { - { X86_VENDOR_AMD, 0x670f00 }, - { 0, 0 }, -}; - -static const struct cpu_driver model_15 __cpu_driver = { - .ops = &cpu_dev_ops, - .id_table = cpu_table, -};