Michael Niewöhner has uploaded this change for review. ( https://review.coreboot.org/c/coreboot/+/36216 )
Change subject: soc/intel: common,skl,cnl,icl: drop reserved mmio memory size calculation ......................................................................
soc/intel: common,skl,cnl,icl: drop reserved mmio memory size calculation
Remove the calculation of the Reserved Intel MMIO Memory size from systemagent and memmap for two reasons:
1. It is not needed. The size is used in SA to calculate the space between cbmem_top and TSEG without DPR and Chipset Reserved Memory. Since this will always be equal to 0, the reservation will be skipped and TSEG, DPR and Chipset Reserved Memory will get reserved alltogether.
2. The reserved memory size is influenced by multiple other factors like PTT, TraceHub, PRMRR etc. Thus it is not trivial to do the calculation right. It fails, for example, when using the TOLUM returned by FSP with a PRMRR size of 0. In this case the size is calculated wrong. This makes it difficult to simply use the TOLUM offset returned by FSP (follow-up change) without adding more weird calculations.
Tested successfully on X11SSM-F
Change-Id: I0cc730551eb3a79c78a971b40056de8d029f4b82 Signed-off-by: Michael Niewöhner foss@mniewoehner.de --- M src/soc/intel/cannonlake/memmap.c M src/soc/intel/common/block/include/intelblocks/systemagent.h M src/soc/intel/common/block/systemagent/systemagent.c M src/soc/intel/icelake/memmap.c M src/soc/intel/skylake/memmap.c 5 files changed, 4 insertions(+), 63 deletions(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/16/36216/1
diff --git a/src/soc/intel/cannonlake/memmap.c b/src/soc/intel/cannonlake/memmap.c index f3286cc..8ba69e5 100644 --- a/src/soc/intel/cannonlake/memmap.c +++ b/src/soc/intel/cannonlake/memmap.c @@ -192,21 +192,6 @@ return dram_base; }
-/* - * SoC implementation - * - * SoC call to summarize all Intel Reserve MMIO size and report to SA - */ -size_t soc_reserved_mmio_size(void) -{ - struct ebda_config cfg; - - retrieve_ebda_object(&cfg); - - /* Get Intel Reserved Memory Range Size */ - return cfg.reserved_mem_size; -} - /* Fill up memory layout information */ void fill_soc_memmap_ebda(struct ebda_config *cfg) { diff --git a/src/soc/intel/common/block/include/intelblocks/systemagent.h b/src/soc/intel/common/block/include/intelblocks/systemagent.h index 133047c..ae9213c 100644 --- a/src/soc/intel/common/block/include/intelblocks/systemagent.h +++ b/src/soc/intel/common/block/include/intelblocks/systemagent.h @@ -106,8 +106,4 @@ /* SoC specific APIs to get UNCORE PRMRR base and mask values * returns 0, if able to get base and mask values; otherwise returns -1 */ int soc_get_uncore_prmmr_base_and_mask(uint64_t *base, uint64_t *mask); - -/* SoC call to summarize all Intel Reserve MMIO size and report to SA */ -size_t soc_reserved_mmio_size(void); - #endif /* SOC_INTEL_COMMON_BLOCK_SA_H */ diff --git a/src/soc/intel/common/block/systemagent/systemagent.c b/src/soc/intel/common/block/systemagent/systemagent.c index 0312cac..bd925b3 100644 --- a/src/soc/intel/common/block/systemagent/systemagent.c +++ b/src/soc/intel/common/block/systemagent/systemagent.c @@ -46,11 +46,6 @@ return -1; }
-__weak size_t soc_reserved_mmio_size(void) -{ - return 0; -} - __weak unsigned long sa_write_acpi_tables(struct device *dev, unsigned long current, struct acpi_rsdp *rsdp) @@ -156,7 +151,6 @@ { uintptr_t base_k, touud_k; size_t dpr_size = 0, size_k; - size_t reserved_mmio_size; uint64_t sa_map_values[MAX_MAP_ENTRIES]; uintptr_t top_of_ram; int index = *resource_count; @@ -164,9 +158,6 @@ if (CONFIG(SA_ENABLE_DPR)) dpr_size = sa_get_dpr_size();
- /* Get SoC reserve memory size as per user selection */ - reserved_mmio_size = soc_reserved_mmio_size(); - top_of_ram = (uintptr_t)cbmem_top();
/* 0 - > 0xa0000 */ @@ -181,14 +172,13 @@
sa_get_mem_map(dev, &sa_map_values[0]);
- /* top_of_ram -> TSEG - DPR - Intel Reserve Memory Size*/ + /* top_of_ram -> TSEG - DPR */ base_k = top_of_ram; - size_k = sa_map_values[SA_TSEG_REG] - dpr_size - base_k - - reserved_mmio_size; + size_k = sa_map_values[SA_TSEG_REG] - dpr_size - base_k; mmio_resource(dev, index++, base_k / KiB, size_k / KiB);
- /* TSEG - DPR - Intel Reserve Memory Size -> BGSM */ - base_k = sa_map_values[SA_TSEG_REG] - dpr_size - reserved_mmio_size; + /* TSEG - DPR -> BGSM */ + base_k = sa_map_values[SA_TSEG_REG] - dpr_size; size_k = sa_map_values[SA_BGSM_REG] - base_k; reserved_ram_resource(dev, index++, base_k / KiB, size_k / KiB);
diff --git a/src/soc/intel/icelake/memmap.c b/src/soc/intel/icelake/memmap.c index 20c4e6f..122cb1a 100644 --- a/src/soc/intel/icelake/memmap.c +++ b/src/soc/intel/icelake/memmap.c @@ -190,21 +190,6 @@ return dram_base; }
-/* - * SoC implementation - * - * SoC call to summarize all Intel Reserve MMIO size and report to SA - */ -size_t soc_reserved_mmio_size(void) -{ - struct ebda_config cfg; - - retrieve_ebda_object(&cfg); - - /* Get Intel Reserved Memory Range Size */ - return cfg.reserved_mem_size; -} - /* Fill up memory layout information */ void fill_soc_memmap_ebda(struct ebda_config *cfg) { diff --git a/src/soc/intel/skylake/memmap.c b/src/soc/intel/skylake/memmap.c index 29f2517..12446de 100644 --- a/src/soc/intel/skylake/memmap.c +++ b/src/soc/intel/skylake/memmap.c @@ -217,21 +217,6 @@ return dram_base; }
-/* - * SoC implementation - * - * SoC call to summarize all Intel Reserve MMIO size and report to SA - */ -size_t soc_reserved_mmio_size(void) -{ - struct ebda_config cfg; - - retrieve_ebda_object(&cfg); - - /* Get Intel Reserved Memory Range Size */ - return cfg.reserved_mem_size; -} - /* Fill up memory layout information */ void fill_soc_memmap_ebda(struct ebda_config *cfg) {